BMC based HROT implementation establishing chain of trust in a secured server system
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus is a BMC. The BMC load a data section, from a firmware image into a first memory, containing a first boot program and encrypted with a first private key of a first public key/private key pair. The BMC obtains a first public key, of the first public key/private key pair, that is embedded in a hardware component of the BMC. The BMC validates the data section containing the first boot program based on the first public key.
1 . A method of operating a baseboard management controller (BMC), comprising:
loading a data section, from a firmware image into a first memory, containing a first boot program and encrypted with a first private key of a first public key/private key pair;
obtaining a first public key, of the first public key/private key pair, that is embedded in a hardware component of the BMC, wherein the hardware component is a one-time programmable (OTP) memory of a processing unit of the BMC;
validating the data section containing the first boot program based on the first public key by decrypting the data section using the first public key to obtain the first boot program and comparing a calculated hash of the decrypted data section to a stored hash in the decrypted data section;
when the data section containing the first boot program is valid, executing the first boot program, wherein the first boot program is configured to:
load a data section, from the firmware image, containing a second boot program; and
validate the data section containing the second boot program;
when the data section containing the second boot program is valid, executing the second boot program, wherein the second boot program is configured to:
load one or more data sections, from the firmware image and into a second memory, containing components of an operating system (OS) and encrypted with a second private key of a second public key/private key pair;
load a platform specific data section, from the firmware image into the second memory, wherein the platform specific data section is distinct from and separate from the data section containing the second boot program;
obtain a second public key, of the second public key/private key pair, from the loaded platform specific data section; and
validate the one or more data sections based on the second public key by decrypting the one or more data sections using the second public key to obtain the components of the OS and comparing calculated hashes of the decrypted one or more data sections to stored hashes in the decrypted one or more data sections.
2 . The method of claim 1 , wherein the first memory is a static memory.
3 . The method of claim 1 , further comprising:
when the one or more data sections are valid, executing the OS.
4 . The method of claim 1 , wherein the data section containing the second boot program and the one or more data sections are loaded into the second memory that is a dynamic memory.
5 . The method of claim 1 , further comprising:
when any data section containing the first boot program, the second boot program, or the components of the OS is not valid, terminating booting.
6 . An apparatus, the apparatus being a baseboard management controller (BMC), comprising:
a first memory; and
at least one processor coupled to the first memory and configured to:
load a data section, from a firmware image into the first memory, containing a first boot program and encrypted with a first private key of a first public key/private key pair;
obtain a first public key, of the first public key/private key pair, that is embedded in a hardware component of the BMC, wherein the hardware component is a one-time programmable (OTP) memory of a processing unit of the BMC;
validate the data section containing the first boot program based on the first public key by decrypting the data section using the first public key to obtain the first boot program and comparing a calculated hash of the decrypted data section to a stored hash in the decrypted data section;
when the data section containing the first boot program is valid, execute the first boot program, wherein the first boot program is configured to:
load a data section, from the firmware image, containing a second boot program; and
validate the data section containing the second boot program;
when the data section containing the second boot program is valid, execute the second boot program, wherein the second boot program is configured to:
load one or more data sections, from the firmware image and into a second memory, containing components of an operating system (OS) and encrypted with a second private key of a second public key/private key pair;
load a platform specific data section, from the firmware image into the second memory, wherein the platform specific data section is distinct from and separate from the data section containing the second boot program;
obtain a second public key, of the second public key/private key pair, from the loaded platform specific data section; and
validate the one or more data sections based on the second public key by decrypting the one or more data sections using the second public key to obtain the components of the OS and comparing calculated hashes of the decrypted one or more data sections to stored hashes in the decrypted one or more data sections.
7 . The apparatus of claim 6 , wherein the first memory is a static memory.
8 . The apparatus of claim 6 , wherein the at least one processor is further configured to:
when the one or more data sections are valid, execute the OS.
9 . The apparatus of claim 6 , wherein the data section containing the second boot program and the one or more data sections are loaded into the second memory that is a dynamic memory.
10 . The apparatus of claim 6 , wherein the at least one processor is further configured to:
when any data section containing the first boot program, the second boot program, or the components of the OS is not valid, terminate booting.
11 . A non-transitory computer-readable medium storing computer executable code for operating a baseboard management controller (BMC), comprising code to:
load a data section, from a firmware image into a first memory, containing a first boot program and encrypted with a first private key of a first public key/private key pair;
obtain a first public key, of the first public key/private key pair, that is embedded in a hardware component of the BMC, wherein the hardware component is a one-time programmable (OTP) memory of a processing unit of the BMC;
validate the data section containing the first boot program based on the first public key by decrypting the data section using the first public key to obtain the first boot program and comparing a calculated hash of the decrypted data section to a stored hash in the decrypted data section;
when the data section containing the first boot program is valid, execute the first boot program, wherein the first boot program is configured to:
load a data section, from the firmware image, containing a second boot program; and
validate the data section containing the second boot program;
when the data section containing the second boot program is valid, execute the second boot program, wherein the second boot program is configured to:
load one or more data sections, from the firmware image and into a second memory, containing components of an operating system (OS) and encrypted with a second private key of a second public key/private key pair;
load a platform specific data section, from the firmware image into the second memory, wherein the platform specific data section is distinct from and separate from the data section containing the second boot program;
obtain a second public key, of the second public key/private key pair, from the loaded platform specific data section; and
validate the one or more data sections based on the second public key by decrypting the one or more data sections using the second public key to obtain the components of the OS and comparing calculated hashes of the decrypted one or more data sections to stored hashes in the decrypted one or more data sections.
12 . The non-transitory computer-readable medium of claim 11 , wherein the first memory is a static memory.
13 . The non-transitory computer-readable medium of claim 11 , wherein the code is further configured to:
when the one or more data sections are valid, execute the OS.
14 . The non-transitory computer-readable medium of claim 11 , wherein the data section containing the second boot program and the one or more data sections are loaded into the second memory that is a dynamic memory.