IP Library Granted Patent US 12,308,882
Granted Patent B2
US 12,308,882 · App. 18/089,250 · Granted May 20, 2025

Nonlinearity compensation circuit, and optical transceiver

Inventors: Hisao Nakashima (Kawasaki, JP); Naoya Okada (Yokohama, JP)
Assignee: Fujitsu Limited
H04B10/2543H04B10/6163
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Quick Facts
Patent No.
US 12,308,882
App. No.
18/089,250
Granted
May 20, 2025
Kind
B2
Abstract

A nonlinearity compensation circuit includes a detector that detects a combination of input levels of a plurality of input signals, a memory that saves a correction value information item to compensate for nonlinear distortion, the correction value information item being saved corresponding to the combination of the input levels, and a compensator that corrects a target signal among said plurality of input signals using the correction value information item acquired from the memory based on the combination of the input levels detected by the detector.

Claims (39)

1. A nonlinearity compensation circuit comprising:

a detector that detects a combination of input levels of a plurality of input signals;

a memory that saves a correction value information item to compensate for nonlinear distortion, the correction value information item being saved corresponding to the combination of the input levels; and

a compensator that corrects a target signal among said plurality of input signals using the correction value information item acquired from the memory based on the combination of the input levels detected by the detector,

wherein the detector detects the combination of the input levels using a detection threshold that identifies input levels fewer than a number of amplitude levels determined by a modulation and demodulation scheme.

2. The nonlinearity compensation circuit as claimed in claim 1 ,

wherein the detector detects input levels of consecutive input signals including the target signal, a preceding signal, and a subsequent signal to detect the combination of the input levels.

3. The nonlinearity compensation circuit as claimed in claim 1 ,

wherein the detector detects the combination of the input levels using fewer detection threshold levels than the number of the amplitude levels determined by the modulation and demodulation scheme by splitting evenly or unevenly the amplitude levels determined by the modulation and demodulation scheme into groups fewer than the number of the amplitude levels.

4. The nonlinearity compensation circuit as claimed in claim 1 ,

wherein the detector detects the combination of the input levels using an uneven detection threshold that identifies each of the amplitude levels near a peak and a valley of the amplitude levels determined by the modulation and demodulation scheme, and that identifies two or more amplitude levels as a same amplitude level in a middle region of the amplitude levels determined by the modulation and demodulation scheme.

5. The nonlinearity compensation circuit as claimed in claim 1 ,

wherein the correction value information item is saved in a lookup table, and

wherein the lookup table has Lm addresses where m denotes a number of said plurality of the input signals, and L denotes a number of amplitude levels to be identified.

6. A nonlinearity compensation circuit comprising:

a detector that detects a combination of input levels of a plurality of input signals;

a memory that saves a correction value information item to compensate for nonlinear distortion, the correction value information item being saved corresponding to the combination of the input levels; and

a compensator that corrects a target signal among said plurality of input signals using the correction value information item acquired from the memory based on the combination of the input levels detected by the detector,

wherein the detector detects the combination of the input levels using a common detection threshold used among two or more modulation and demodulation schemes.

7. An optical transceiver comprising:

a transmitter digital signal processor;

a transmitter front-end circuit connected to an output of the transmitter digital signal processor;

a receiver front-end circuit;

a receiver digital signal processor connected to an output of the receiver front-end circuit; and

a nonlinearity compensation circuit that compensates for nonlinear distortion of a transmission or received signal,

wherein the nonlinearity compensation circuit includes

a detector that detects a combination of input levels of a plurality of input signals,

a memory that saves a correction value information item to compensate for nonlinear distortion, corresponding to the combination of the input levels, and

a compensator that corrects a target signal among said plurality of input signals using the correction value information item acquired from the memory based on the combination of the input levels detected by the detector,

wherein the detector detects the combination of the input levels using a detection threshold that identifies input levels fewer than a number of amplitude levels determined by a modulation and demodulation scheme.

8. The optical transceiver as claimed in claim 7 ,

wherein the nonlinearity compensation circuit is connected to an output of a symbol generator or an output of a Nyquist filter provided in the transmitter digital signal processor, and corrects an electrical signal to be supplied to the transmitter front-end circuit.

9. The optical transceiver as claimed in claim 7 ,

wherein the nonlinearity compensation circuit corrects the nonlinear distortion in an electrical signal restored by the receiver digital signal processor.

10. The optical transceiver as claimed in claim 7 , comprising:

a correction value generating circuit that generates the correction value information item saved in the memory,

wherein the correction value generating circuit generates the correction value information item based on a transmission signal produced by the transmitter digital signal processor and a received signal restored by the receiver digital signal processor.

11. The optical transceiver as claimed in claim 10 ,

wherein the correction value generating circuit detects amplitude levels of a plurality of the transmission signals to specify a combination of the amplitude levels, and calculates a correction value of a target transmission signal among said plurality of the transmission signals for the combination of the amplitude levels, based on a difference or a ratio between the transmission signal and the received signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2026
From: FUJITSU LIMITED
To: 1FINITY INC.
Reel/Frame 074197/0244 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2022
From: NAKASHIMA, HISAO; OKADA, NAOYA
To: FUJITSU LIMITED
Reel/Frame 062213/0549 →
Priority Claims (1)
JP 2022-056189 · Mar 30, 2022 · national
Continuity (1)
Related Publication 20230318709A1 · Oct 5, 2023
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