Histogram creation process for memory devices

1. A processor-in-memory device, comprising:

a memory array;

an accumulator coupled to the memory array; and

a sense amplifier, wherein the sense amplifier is coupled to the accumulator and the memory array; and

wherein the processor-in-memory device is configured to:

receive a data set comprising a plurality of data batches, wherein each data batch comprises a plurality of data points;

determine to which category of a plurality of categories each data point in a first data batch of the plurality of data batches belongs;

set a value of a flag bit, in the sense amplifier, wherein the flag bit corresponds, in a bit position, to the category of the plurality of categories to which a data point in the first data batch of data is determined to belong;

after having set a value of each of a first subset of a set of flag bits in the sense amplifier, each flag bit of the first subset respectively corresponding, in bit position, to a category of data determined to be present in the first data batch of the plurality of data batches, increment a value stored in the accumulator;

modify one or more values stored in the memory array using the incremented value stored in the accumulator; and

generate a histogram of the first data batch using the one or more values stored in the memory array.

2. The processor-in-memory device of claim 1 , wherein the processor-in-memory device is configured to generate the histogram of the first data batch of the data set using the incremented value based on whether or not a corresponding respective flag bit stored in the sense amplifier was set as part of the first subset such that a first data point determined to belong to a first category of the plurality of categories in the first data batch is counted but not any subsequent data points in the first data batch that are determined to be in the first category.

3. The processor-in-memory device of claim 1 , wherein the processor-in-memory device is configured to increment the value stored in the accumulator by performing a bit-wise OR operation using the value set in the sense amplifier and the value stored in the accumulator.

4. The processor-in-memory device of claim 1 , wherein the processor-in-memory is configured to increment the value stored in the sense amplifier in parallel.

5. The processor-in-memory device of claim 1 , wherein the processor-in-memory device is configured to receive a mapping configuration assigning an identification number and one of a plurality of memory locations in the memory array to each of the plurality of categories.

6. The processor-in-memory device of claim 1 , wherein the processor-in-memory device is configured to generate the histogram by:

clearing data stored in the memory array;

for each data point in the first data batch:

performing a bit-wise OR operation using values in the sense amplifier and values in the accumulator as operands; and

saving a result of the bit-wise OR operation in the accumulator.

7. The processor-in-memory device of claim 1 , wherein the sense amplifier stores a plurality of bits.

8. The processor-in-memory device of claim 1 , wherein the memory array is a dynamic random access memory array.

9. A system, comprising:

a processor;

an accumulator coupled to the processor;

a sense amplifier coupled to the accumulator and the processor; and

wherein the processor is configured to:

receive a data set comprising a plurality of data batches, wherein each data batch comprises a plurality of data points;

determine to which category of a plurality of categories each data point in a first data batch of the plurality of data batches belongs;

set a value of a flag bit, in the sense amplifier, wherein the flag bit corresponds, in a bit position, to the category of the plurality of categories to which a data point in the first data batch of data is determined to belong;

after having set a value of each of a first subset of a set of flag bits in the sense amplifier, each flag bit of the first subset respectively corresponding, in bit position, to a category of data determined to be present in the first data batch of the plurality of data batches, increment the value stored in the accumulator; and

generate a histogram of the first data batch using the incremented value.

10. The system of claim 9 , wherein the processor is a processor of a processor-in-memory device.

11. The system of claim 10 , wherein the processor-in-memory device is configured to:

increment at least one value in a memory location of the processor-in-memory device, corresponding to the set flag bits of the first data batch, and determine if the first data batch of data is the last data batch of the data set.

12. The system of claim 9 , wherein the processor is configured to increment the value stored in the accumulator by performing a bit-wise OR operation using the value set in the sense amplifier and the value stored in the accumulator.

13. The system of claim 9 , wherein the processor is configured to receive a mapping configuration assigning an identification number and one of a plurality of memory locations in a memory array to each of the plurality of categories.

14. The system of claim 9 , wherein the processor is configured to generate the histogram of the first data batch of the data set using the incremented value based on whether or not a corresponding respective flag bit stored in the sense amplifier was set as part of the first subset such that a first data point determined to belong to a first category of the plurality of categories in the first data batch is counted but not any subsequent data points in the first data batch that are determined to be in the first category.

15. The system of claim 9 , wherein the processor is configured to clear data in the accumulator prior to determining to which category of the plurality of categories each data point in the first data batch of the plurality of data batches belongs.

16. The system of claim 9 , wherein the processor is configured to read the data set from a memory array coupled to the processor before determining to which category of the plurality of categories each data point in the first data batch of the plurality of data batches belongs.

17. The system of claim 9 , wherein the sense amplifier is coupled between the accumulator and a memory array.

18. A system, comprising:

a host processor; and

a processor-in-memory device coupled to the host processor, wherein the processor-in-memory device comprises:

a memory array including a plurality of memory locations, wherein each of the memory locations stores a value;

an accumulator coupled to a first group of the plurality of memory locations;

a sense amplifier storing a plurality of bits, wherein the sense amplifier is coupled to the accumulator and the memory array; and

wherein the processor-in-memory device is configured to:

receive a data set comprising a plurality of data batches, wherein each data batch comprises a plurality of data points;

determine to which category of a plurality of categories each data point in a first data batch of the plurality of data batches belongs;

set a value of a flag bit in the sense amplifier, wherein the flag bit corresponds, in a bit position, to the category of the plurality of categories to which a data point in the first data batch of data is determined to belong;

after having set a value of each of a first subset of a set of flag bits in the sense amplifier, each flag bit of the first subset respectively corresponding, in bit position, to a category of data determined to be present in the first data batch of the plurality of data batches, performing, a bit-wise OR operation using the value of the first subset of the set of flag bits stored in the sense amplifier and values in the accumulator as operands to generate a result;

modify one or more values stored in the memory array using the result; and

generate a histogram of the first data batch using the one or more values stored in the memory array.

19. The system of claim 18 , wherein the host processor is configured to transmit a request to generate the histogram to the memory processor.

20. The system of claim 18 , wherein the processor-in-memory device is configured to read the data set from the memory array before determining to which category of the plurality of categories each data point in the first data batch of the plurality of data batches belongs.