Orthogonal frequency scheme for narrowband acoustic signaling

1. A transmitter comprising:

a clock configured to generate one or more output clock signals;

at least one frequency divider configured to generate a plurality of divided frequencies based on the one or more output clock signals;

a modulator;

at least one antenna or transducer configured to transmit modulated data;

a memory configured to store instructions; and

at least one processor configured to execute the instructions performing operations comprising:

mapping data to a decimal code value of a plurality of decimal code values;

converting the decimal code value to a shrinking base system; and

selecting a set of frequencies among the plurality of divided frequencies based on a code value corresponding to the shrinking base system for the decimal code value;

wherein the modulator is configured to modulate the decimal code value using the set of frequencies, and

wherein a center frequency of the set of frequencies is approximately 20 KHz.

2. The transmitter of claim 1 , wherein the modulator is further configured to modulate using a frequency shift key (FSK) modulation scheme.

3. The transmitter of claim 1 , wherein the set of frequencies is a subset of the plurality of divided frequencies.

4. The transmitter of claim 1 , wherein the set of frequencies are in an ultrasonic frequency range.

5. The transmitter of claim 1 , wherein each frequency in the set of frequencies is different from other frequencies in the set of frequencies.

6. The transmitter of claim 1 , wherein frequencies in the set of frequencies are orthogonal frequencies.

7. The transmitter of claim 1 , wherein a total frequency spacing of the plurality of divided frequencies is not more than twice a chip frequency.

8. The transmitter of claim 1 , wherein the operations further comprise:

determining a plurality of integer frequency divider values to generate the plurality of divided frequencies corresponding to a signal bandwidth and a center carrier frequency.

9. The transmitter of claim 1 , wherein the operations further comprise:

determining a chip period corresponding to each frequency of the plurality of divided frequencies,

wherein the determined chip period corresponding to each frequency of the plurality of divided frequencies maintains phase continuity.

10. The transmitter of claim 1 , wherein signaling information comprises location information of the transmitter.

11. A method comprising:

receiving, via a user interface, a clock frequency, a center carrier frequency, a signal bandwidth, and a count of frequencies to be generated;

determining a plurality of divided frequencies based on the clock frequency, the signal bandwidth, and the count of frequencies to be generated;

determining a plurality of integer frequency divider values corresponding to the plurality of divided frequencies;

generating, by one or more frequency dividers, the plurality of divided frequencies;

mapping transmission data to a decimal code value of a plurality of decimal code values; and

selecting a set of frequencies among the plurality of divided frequencies corresponding to the decimal code value for modulating the decimal code value to transmit,

wherein the set of frequencies is a subset of the plurality of divided frequencies, and

wherein a center frequency of the set of frequencies is approximately 20 KHz.

12. The method of claim 11 , wherein modulating the decimal code value further comprises modulating using a frequency shift keying (FSK) modulation scheme.

13. The method of claim 11 , wherein the selecting the set of frequencies comprises selecting frequencies in an ultrasonic frequency range.

14. The method of claim 11 , wherein frequencies in the set of frequencies are orthogonal frequencies.

15. The method of claim 11 , wherein the selecting the set of frequencies further comprises:

converting the decimal code value to a shrinking base system; and

selecting a frequency corresponding to each value of the decimal code value based on the shrinking base system from the plurality of divided frequencies,

wherein the frequency corresponding to each value of the decimal code value based on the shrinking base system is different from each other.

16. The method of claim 11 , wherein the determining the plurality of divided frequencies further comprises maintaining a total frequency spacing of the plurality of divided frequencies of not more than twice a chip frequency.

17. The method of claim 11 , further comprising determining a chip period corresponding to each frequency of the plurality of divided frequencies to maintain phase continuity.

18. The method of claim 11 , further comprising determining orthogonality of the decimal code value in deconvolution process to identify a bad decimal code value.

19. The method of claim 18 , wherein identifying the bad decimal code value, the method further comprises performing auto-correlation of a frequency spectrum corresponding to the bad decimal code value to measure an auto-correlation function width.

20. The method of claim 11 , wherein modulating the decimal code value further comprises modulating using a 5-FSK modulation scheme.