IP Library Granted Patent US 12,656,179
Granted Patent B2
US 12,656,179 · App. 18/108,154 · Granted Jun 16, 2026

Process flow for thin contactless thermal sensors

Inventors: Enri Duqi (Milan, IT); Giorgio Allegato (Monza, IT)
Assignee: STMicroelectronics International N.V.
G01J5/10B81B7/0038B81B7/007B81C1/00285B81C1/00301B81B2201/0278B81B2207/012B81B2207/07B81B2207/097B81C2203/0109B81C2203/0792G01J2005/106
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Quick Facts
Patent No.
US 12,656,179
App. No.
18/108,154
Granted
Jun 16, 2026
Kind
B2
Abstract

Disclosed herein is a method of forming a thermal sensor, including patterning an active layer on a first face of a handle substrate to form a frame, a mass carrying at least one thermally isolated MOS (TMOS) transistor, and a spring structure connecting the mass to the frame while thermally isolating the mass from the frame. The frame is then bonded to pads on a first face of an integrated circuit substrate. The handle substrate is removed, and a top cap is bonded to the first face of the integrated circuit substrate to enclose at least the mass and spring within the sealed cavity.

Claims (27)

1 . A method of forming a thermal sensor, comprising:

patterning an active layer on a first face of a handle substrate to form a frame, a mass carrying at least one thermally isolated MOS (TMOS) transistor, and a spring structure connecting the mass to the frame while thermally isolating the mass from the frame;

bonding the frame to pads on a first face of an integrated circuit substrate;

completely removing the handle substrate; and

bonding a top cap to the first face of the integrated circuit substrate to enclose at least the mass and spring within a sealed cavity.

2 . The method of claim 1 , wherein bonding the frame to the pads is performed via metal bonding to thereby make electrical contact from the pads to the at least one TMOS transistor through a non-metal conductive path extending from the frame, through the spring, to the at least one TMOS transistor within the mass.

3 . The method of claim 2 , wherein electrical contact is also made from the pads to an application specific integrated circuit (ASIC) within the integrated circuit substrate.

4 . The method of claim 1 , wherein bonding the top cap to the first face of the integrated circuit substrate is performed by glass frit bonding a sidewall of the top cap to the first face of the integrated circuit substrate.

5 . The method of claim 4 , wherein the glass frit bonding results in glass material expanding into a trench defined in an interior surface of the top cap.

6 . The method of claim 4 , wherein the glass frit bonding results in glass material expanding over a portion of the frame.

7 . The method of claim 1 , wherein bonding the top cap to the first face of the integrated circuit substrate forms a chamber containing the frame, spring, and mass, the chamber delimited at its top by an interior surface of the top cap, at its bottom by a cavity formed into the first face of the integrated circuit substrate, and at its sides by sidewalls of the cavity and sidewalls of the top cap.

8 . The method of claim 7 , wherein bonding the top cap to the first face of the integrated circuit is performed in a vacuum such that a pressure within the chamber is substantially at vacuum.

9 . The method of claim 8 , further comprising, prior to bonding the top cap to the first face of the integrated circuit substrate, forming a getter layer on an interior surface of the top cap about a perimeter thereof, wherein the getter layer is configured to maintain the vacuum within the chamber during operation.

10 . The method of claim 1 , further comprising forming an anti-reflective layer on a second face of the top cap, the anti-reflective layer reducing reflection of incident infrared radiation.

11 . The method of claim 1 , further comprising forming an anti-reflective layer on a second face of the integrated circuit substrate, the anti-reflective layer reducing reflection of incident infrared radiation.

12 . The method of claim 1 , further comprising attaching a wire bonding to at least one of the pads on the first face of the integrated circuit substrate at a portion of said pad external to a chamber created between the top cap and the integrated circuit.

13 . The method of claim 1 , further comprising attaching solder balls to at least one of the pads on the first face of the integrated circuit substrate at a portion of said pad external to a chamber created between the top cap and the integrated circuit.

14 . The method of claim 1 , further comprising, prior to patterning the active layer, forming the active layer on the first face of the handle substrate, wherein forming the active layer includes forming the least one TMOS transistor within the active layer.

15 . A method of fabricating a thermal sensor, comprising:

bonding a patterned active layer including a mass carrying at least one thermally isolated MOS transistor and connected to a frame by a spring structure to a first face of an integrated circuit substrate;

enclosing the patterned active layer with a top cap bonded to the integrated circuit substrate to form a sealed chamber;

performing the bonding in a vacuum such that the sealed chamber is evacuated; and

depositing a getter material on an interior surface of the top cap to maintain the vacuum during operation of the sensor.

16 . The method of claim 15 , wherein performing the bonding comprises bonding the top cap to the integrated circuit substrate by glass frit bonding a sidewall of the top cap to the first face of the integrated circuit substrate.

17 . The method of claim 16 , wherein the glass frit bonding expands into a trench defined in the sidewall of the top cap.

18 . The method of claim 16 , wherein the glass frit bonding extends over a portion of a frame surrounding the active layer.

19 . The method of claim 15 , wherein the getter material is disposed on a portion of the top cap laterally spaced apart from the mass carrying the at least one thermally isolated MOS transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2024
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 066957/0012 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2023
From: DUQI, ENRI; ALLEGATO, GIORGIO
To: STMICROELECTRONICS S.R.L.
Reel/Frame 062652/0450 →
Continuity (1)
Related Publication 20240272004A1 · Aug 15, 2024
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