IP Library Granted Patent US 12,124,732
Granted Patent B2
US 12,124,732 · App. 18/116,683 · Granted Oct 22, 2024

Information processing apparatus, data control method, and recording medium for parallel access of processors to storage areas

Inventors: Satoshi Kodaira (Tokyo, JP); Yusuke Yamamoto (Tokyo, JP); Yoshihide Shirai (Tokyo, JP)
Assignee: Hitachi, LTD.
G06F3/0655G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 12,124,732
App. No.
18/116,683
Granted
Oct 22, 2024
Kind
B2
Abstract

An information processing apparatus includes a main CPU storage area and a sub-CPU storage area. The information processing apparatus further includes an FPGA capable of processing access to the main CPU storage area by a main CPU and access to the sub-CPU storage area by a second CPU in parallel. The FPGA has an FPGA control unit that performs processing. The FPGA control unit is configured to read prescribed data from an SPI device to the main CPU storage area and the sub-CPU storage area, update the prescribed data of the sub-CPU storage area when receiving an updating request from the sub-CPU, and read the prescribed data of the main CPU storage area to the main CPU when receiving a reading request from the main CPU.

Claims (52)

1. An information processing apparatus comprising:

a first processor;

a second processor; and

a storage device configured to manage prescribed data used by the first processor, wherein

the information processing apparatus further includes:

a processing circuit having:

a first storage area accessible by the first processor;

a second storage area accessible by the second processor and capable of processing access to the first storage area by the first processor and access to the second storage area by the second processor in parallel and accessing the storage device;

a management table providing an initializing processing for the processing circuit; and

a third processor configured to;

read the prescribed data from the storage device and write the prescribed data to the first storage area and the second storage area,

update the prescribed data of the second storage area when receiving an updating request of the prescribed data from the second processor,

read the prescribed data of the first storage area and send the prescribed data to the first processor when receiving a reading request of the prescribed data from the first processor, and

wherein, in the initializing processing, the third processor writes in the management table a comment on whether the first processor is reading the prescribed data, and receives a response to the comment.

2. The information processing apparatus according to claim 1 , wherein the third processor is further configured to;

perform copy processing to copy updated data to the first storage area when the prescribed data of the second storage area is updated, and

copy the updated data after access by the first processor ends when the access to the first storage area is being made by the first processor in the copy processing.

3. The information processing apparatus according to claim 2 , wherein the third processor is further configured to;

copy the updated data of the second storage area to the storage device.

4. The information processing apparatus according to claim 3 , wherein the third processor is further configured to:

copy the updated data to the first storage area after copying the updated data to the storage device.

5. The information processing apparatus according to claim 2 , wherein

the processing circuit includes an FPGA (Field Programmable Gate Array).

6. The information processing apparatus according to claim 2 , wherein

the prescribed data is firmware used by the first processor.

7. A data control method by an information processing apparatus having:

a first processor,

a second processor, and

a storage device that manages prescribed data used by the first processor,

the information processing apparatus further having a processing circuit having:

a first storage area accessible by the first processor;

a second storage area accessible by the second processor and capable of processing access to the first storage area by the first processor and access to the second storage area by the second processor in parallel and accessing the storage device; and

a management table providing an initializing processing for the processing circuit,

the data control method comprising:

reading the prescribed data from the storage device and writing the prescribed data to the first storage area and the second storage area;

updating the prescribed data of the second storage area when receiving an updating request of the prescribed data from the second processor;

reading the prescribed data of the first storage area and send the prescribed data to the first processor when receiving a reading request of the prescribed data from the first processor,

writing, in the initializing processing, in the management table a comment on whether the first processor is reading the prescribed data, and receiving a response to the comment form the management table.

8. A non-transitory computer-readable medium storing a data control program performed by a computer having:

a first processor,

a second processor, and

a storage device that manages prescribed data used by the first processor, wherein

the computer further has:

a processing circuit having a first storage area accessible by the first processor;

a second storage area accessible by the second processor and capable of processing access to the first storage area by the first processor and access to the second storage area by the second processor in parallel and accessing the storage device;

a management table providing an initializing processing for the processing circuit; and

a third processor,

the data control program causes the computer to:

read the prescribed data from the storage device and write the prescribed data to the first storage area and the second storage area;

update the prescribed data of the second storage area when receiving an updating request of the prescribed data from the second processor; and

read the prescribed data of the first storage area and send the prescribed data to the first processor when receiving a reading request of the prescribed data from the first processor,

wherein, in the initializing processing, the third processor writes in the management table a comment on whether the first processor is reading the prescribed data, and receives a response to the comment.

Assignments (2)
DE-MERGER EFFECTIVE APRIL 1, 2024 Recorded Oct 1, 2024
From: HITACHI, LTD.
To: HITACHI VANTARA, LTD.
Reel/Frame 069052/0281 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2023
From: KODAIRA, SATOSHI; YAMAMOTO, YUSUKE; SHIRAI, YOSHIHIDE
To: HITACHI, LTD.
Reel/Frame 062862/0360 →
Priority Claims (1)
JP 2022-181363 · Nov 11, 2022 · national
Continuity (1)
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