Negative charge extraction structure for edge termination
A gallium nitride (GaN) power device includes a GaN substrate structure having a first surface and a second surface, a metallic layer coupled to the second surface of the GaN substrate structure, and an active region including an array of vertical fin-based field effect transistors (FinFETs) coupled to the GaN substrate structure. The GaN power device also includes an edge termination structure circumscribing the active region and a seal ring structure circumscribing the edge termination structure and comprising a seal ring metal pad operable to conduct charge from the edge termination structure to the metallic layer.
1 . A gallium nitride (GaN) power device comprising:
a GaN substrate structure having a first surface and a second surface;
a metallic layer coupled to the second surface of the GaN substrate structure;
an active region including an array of vertical fin-based field effect transistors (FinFETs) coupled to the GaN substrate structure;
an edge termination structure circumscribing the active region; and
a seal ring structure circumscribing the edge termination structure and comprising a seal ring metal pad operable to conduct charge from the edge termination structure to the metallic layer.
2 . The GaN power device of claim 1 , wherein the GaN substrate structure includes a passivation layer and an interlayer dielectric (ILD) layer and the charge is present at an interface of the passivation layer and the ILD layer.
3 . The GaN power device of claim 2 , wherein the seal ring metal pad is electrically connected to a source metal pad through a via formed in the ILD layer.
4 . The GaN power device of claim 2 , wherein the GaN substrate structure comprises:
an n-type GaN substrate having a growth surface;
a first n-type GaN epitaxial layer coupled to the growth surface of the n-type GaN substrate; and
a second n-type GaN epitaxial layer coupled to the first n-type GaN epitaxial layer;
wherein the ILD layer is coupled to the second n-type GaN epitaxial layer and the passivation layer is coupled to the ILD layer.
5 . The GaN power device of claim 4 , further comprising:
a guard ring disposed in the second n-type GaN epitaxial layer and surrounding a portion of the second n-type GaN epitaxial layer; and
an insulating region formed in the second n-type GaN epitaxial layer and surrounding the guard ring.
6 . The GaN power device of claim 4 , wherein the second n-type GaN epitaxial layer makes ohmic contact with a source metal pad.
7 . The GaN power device of claim 1 , wherein the edge termination structure comprises a plurality of guard rings.
8 . The GaN power device of claim 7 , wherein the plurality of guard rings comprise a plurality of floating guard rings.
9 . A gallium nitride (GaN) power device comprising:
an array of vertical fin-based field effect transistors (FinFETs) disposed in an active region;
an edge termination structure circumscribing the active region; and
an edge seal structure disposed laterally between the edge termination structure and a scribe line, the edge seal structure comprising:
a portion of a p-type GaN layer, wherein the p-type GaN layer is electrically connected to the scribe line;
an interlayer dielectric (ILD) layer coupled to the p-type GaN layer;
a metal pad passing through portions of the ILD layer; and
a gate metal contact electrically connected to the p-type GaN layer.
10 . The GaN power device of claim 9 , wherein the GaN power device further comprises:
an n-type GaN substrate having a first surface and a second surface, wherein the array of FinFETs is coupled to the n-type GaN substrate;
a metallic layer coupled to the second surface of the n-type GaN substrate;
an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, wherein the p-type GaN layer is coupled to the n-type GaN epitaxial layer; and
a passivation layer coupled to the ILD layer.
11 . The GaN power device of claim 10 , wherein the edge seal structure is operable to conduct charge from the edge termination structure to the metallic layer.
12 . The GaN power device of claim 11 , wherein the charge is present at an interface of the passivation layer and the ILD layer.
13 . A gallium nitride (GaN) power device comprising:
an array of vertical fin-based field effect transistors (FinFETs) disposed in an active region;
an edge termination structure circumscribing the active region; and
an edge seal structure disposed laterally between the edge termination structure and a scribe line, the edge seal structure comprising:
an insulation layer electrically connected to the scribe line;
an interlayer dielectric (ILD) layer coupled to the insulation layer; and
a metal pad passing through portions of the ILD layer and electrically connected to the insulation layer.
14 . The GaN power device of claim 13 , wherein the GaN power device further comprises:
an n-type GaN substrate having a first surface and a second surface, wherein the array of FinFETs is coupled to the n-type GaN substrate;
a metallic layer coupled to the second surface of the n-type GaN substrate;
an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, wherein the insulation layer is coupled to the n-type GaN epitaxial layer; and
a passivation layer coupled to the ILD layer.
15 . The GaN power device of claim 14 , wherein the edge seal structure is operable to conduct charge from the edge termination structure to the metallic layer.
16 . The GaN power device of claim 15 , wherein the charge is present at an interface of the passivation layer and the ILD layer.