IP Library Granted Patent US 12,165,808
Granted Patent B2
US 12,165,808 · App. 18/142,915 · Granted Dec 10, 2024

Chip form ultracapacitor

Inventors: Nicolo Michele Brambilla (Brookline, MA); Joseph K. Lane (Branford, CT); John Hyde (Ashland, MA); Wyatt Andree (Revere, MA); Susheel M.J. Kalabathula (Waltham, MA)
Assignee: FASTCAP SYSTEMS CORPORATION
H01G11/76H01G11/14H01G11/62H01G11/82
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Quick Facts
Patent No.
US 12,165,808
App. No.
18/142,915
Granted
Dec 10, 2024
Kind
B2
Abstract

An energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process is disclosed. In some embodiments, the apparatus includes: a sealed housing body (e.g., a lower body with a lid attached thereto) including a positive internal contact and a negative internal contact (e.g., metallic contact pads) disposed within the body and each respectively in electrical communication with a positive external contact and a negative external contact. Each of the external contacts provide electrical communication to the exterior of the body, and may be disposed on an external surface of the body. An electric double layer capacitor (EDLC) (also referred to herein as an “ultracapacitor” or “supercapacitor”) energy storage cell is disposed within a cavity in the body including a stack of alternating electrode layers and electrically insulating separator layers. An electrolyte is disposed within the cavity and wets the electrode layers. A positive lead electrically connects a first group of one or more of the electrode layers to the positive internal contact; and a negative lead electrically connects a second group of one or more of the electrode layers to the negative internal contact.

Claims (40)

1. An energy storage apparatus, the apparatus comprising:

a sealed housing body comprising a positive internal contact and a negative internal contact each disposed within the body and each respectively in electrical communication with a positive external contact and a negative external, each of the external contacts providing electrical communication to the exterior of the body;

an electric double layer capacitor (EDLC) energy storage cell disposed within a cavity in the body comprising a stack of alternating electrode layers and electrically insulating separator layers;

an electrolyte disposed within the cavity and wetting the electrode layers;

a positive lead electrically connecting a first group of one or more of the electrode layers to the positive internal contact; and

a negative lead electrically connecting a second group of one or more of the electrode layers to the negative internal contact; wherein each of the electrode layers comprises an energy storage media that is substantially free from binding agents and wherein the energy storage media comprises a carbonaceous material located in void spaces bound by a network of carbon nanotubes; wherein the housing body is a chip configured for surface mounting on the printed circuit board, wherein, when so mounted, the chip extends no more than about 5.0 mm above a major surface of the printed circuit board.

2. The apparatus of claim 1 , wherein the chip extends no more than about 4.0 mm above a major surface of the printed circuit board.

3. The apparatus of claim 1 , wherein the chip extends no more than about 3.0 mm above a major surface of the printed circuit board.

4. The apparatus of claim 1 , having an operating voltage of at least 2.0 V or more.

5. The apparatus of claim 1 , having an operating voltage of at least 3.0 V or more.

6. The apparatus of claim 1 , having a capacitance of at least 300 milliFarads and an energy density of at least 4 joules per cubic centimeter.

7. The apparatus of claim 1 , having a capacitance of at least 500 milliFarads.

8. The apparatus of claim 1 , having an energy density of at least 4 joules per cubic centimeter.

9. The apparatus of claim 1 , having a peak power density of at least 15 watts per cubic centimeter.

10. The apparatus of claim 1 , having a peak power density of at least 20 watts per cubic centimeter.

11. The apparatus of claim 1 , having an operational lifetime of at least 1,000 hours or more at an operating voltage of at least 2.0 V and at an operating temperature of at least 65° C.

12. The apparatus of claim 1 , having an operational lifetime of at least 2,000 hours or more at an operating voltage of at least 2.0 V and at an operating temperature of at least 65° C.

13. The apparatus of claim 1 , having an operational lifetime of at least 2,000 hours or more at an operating voltage of at least 2.0 V and at an operating temperature of at least 85° C.

14. A method of making an energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process, the method comprising:

forming an electric double layer capacitor (EDLC) energy storage cell comprising a stack of alternating electrode layers and electrically insulating separator layers;

disposing the energy storage cell within a housing body, the body comprising a positive internal contact and a negative internal contact disposed within the body;

at least partially filling the body with electrolyte to wet the electrode layers;

electrically connecting a positive lead from a first group of one or more of the electrode layers to the positive internal contact;

electrically connecting a negative lead from a second group of one or more of the electrode layers to the negative internal contact; wherein each of the electrode layers comprises an energy storage media that is substantially free from binding agents and wherein the energy storage media comprises a carbonaceous material located in void spaces bound by a network of carbon nanotubes;

sealing the housing body with the energy storage cell disposed therein; and

mounting the housing body on a printed circuit board, wherein electric double layer capacitor, when so mounted, extends no more than about 5.0 mm above a major surface of the printed circuit board.

15. The method of claim 14 , wherein sealing the housing body comprises hermetically sealing the housing body.

16. The method of providing energy to a device mounted on a printed circuit board comprising:

mounting the apparatus of claim 1 to the printed circuit board using a solder reflow process; and

repetitively charging and discharging the apparatus at an operating voltage and operating temperature to provide energy to a device;

wherein the operating voltage is at least 2 V and the operating temperature is at least 65° C.

17. The method of claim 16 , comprising repetitively charging and discharging the apparatus at an operating voltage and operating temperature to provide energy to a device for at least 2,000 hours while the apparatus exhibits a capacitance degradation of less than 30% and an equivalent series resistance increase of less than 100%.

18. An energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process, the apparatus comprising:

a sealed housing body comprising a positive internal contact and a negative internal contact each disposed within the sealed housing body and each respectively in electrical communication with a positive external contact and a negative external, each of the external contacts providing electrical communication to the exterior of the sealed housing body;

an electric double layer capacitor (EDLC) energy storage cell disposed within a cavity in the sealed housing body comprising a stack of alternating electrode layers and electrically insulating separator layers; wherein each of the electrode layers comprises an energy storage media that is substantially free from binding agents and wherein the energy storage media comprises a carbonaceous material located in void spaces bound by a network of carbon nanotubes;

an electrolyte disposed within the cavity and wetting the electrode layers;

a positive lead electrically connecting a first group of one or more of the electrode layers to the positive internal contact;

a negative lead electrically connecting a second group of one or more of the electrode layers to the negative internal contact;

the positive internal contact or the negative internal contact comprises a first material having a relatively high electrochemical activity with the electrolyte; and

wherein the sealed housing body is a chip configured for surface mounting on the printed circuit board, wherein, when so mounted, the chip extends no more than about 5.0 mm above a major surface of the printed circuit board.

Assignments (3)
SECURITY INTEREST Recorded Dec 9, 2024
From: FASTCAP ULTRACAPACITORS LLC
To: WINDSAIL CAPITAL FUND, L.P.
Reel/Frame 069547/0440 →
CHANGE OF NAME Recorded Dec 4, 2024
From: FASTCAP SYSTEMS CORPORATION
To: FASTCAP ULTRACAPACITORS LLC
Reel/Frame 069495/0394 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2023
From: BRAMBILLA, NICOLO MICHELE; LANE, JOSEPH K.; HYDE, JOHN; ANDREE, WYATT; KALABATHULA, SUSHEEL M.J.
To: FASTCAP SYSTEMS CORPORATION
Reel/Frame 063532/0464 →
Continuity (4)
Continuation 17507253 · Oct 21, 2021
Continuation 16753553
Provisional Application 62567752 · Oct 3, 2017
Related Publication 20230307193A1 · Sep 28, 2023