IP Library Granted Patent US 11,961,875
Granted Patent B2
US 11,961,875 · App. 18/156,747 · Granted Apr 16, 2024

Monolithic segmented LED array architecture with islanded epitaxial growth

Inventors: Ashish Tandon (Sunnyvale, CA); Rajat Sharma (San Jose, CA); Joseph Flemish (Palo Alto, CA); Andrei Papou (San Jose, CA); Wen Yu (Pleasanton, CA); Erik William Young (San Jose, CA); Yu-Chen Shen (San Jose, CA); Luke Gordon (Santa Barbara, CA)
Assignee: Lumileds LLC
H01L27/156F21S41/153H01L33/007H01L33/20H01L33/305H01L33/502H01L33/505H01L33/507H01S5/00H01L33/0093H01L33/08H01L33/32H01L33/36H01L2933/0016H01L2933/0041
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Quick Facts
Patent No.
US 11,961,875
App. No.
18/156,747
Granted
Apr 16, 2024
Kind
B2
Abstract

A device may include a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer. The device may include a first sidewall and a second sidewall on a second surface of the epitaxial layer distal to the first isolation region and the second isolation region. The device may include a wavelength converting layer on the epitaxial layer between the first sidewall and the second sidewall.

Claims (24)

1. An LED array comprising:

a plurality of pixels, each pixel separated from an adjacent pixel by a trench extending from a p-type semiconductor layer to a distal surface of an n-type semiconductor layer;

an n-type contact in the trench;

the n-type semiconductor layer disposed on an active layer on the p-type semiconductor layer;

a wavelength converting layer on the n-type semiconductor layer on a surface opposite the active layer;

a p-type contact on the p-type semiconductor layer; and

one or more passivation layer extending from the p-type semiconductor layer to the n-type semiconductor layer and separating the n-type contact from the active layer and the p-type layer, the one or more passivation layer extending at least partially on a sidewall of the n-type semiconductor layer,

wherein at least part of the wavelength converting layer is separated by the n-type contact in the trench.

2. The LED array of claim 1 , wherein the n-type contact in the trench forms a protrusion separating the wavelength converting layer on each pixel.

3. The LED array of claim 1 , wherein the active layer comprises a partially doped or undoped Type III-nitride.

4. The LED array of claim 1 , wherein the n-type contact extends to the wavelength converting layer and provides at least partial optical isolation between each pixel.

5. The LED array of claim 1 , wherein the n-type layer and p-type layer are not continuous between the plurality of pixels.

6. An LED array comprising:

a plurality of pixels, each pixel separated from an adjacent pixel by a trench extending from a p-type semiconductor layer to a distal surface of an n-type semiconductor layer;

an n-type contact in the trench;

the n-type semiconductor layer disposed on an active layer on the p-type semiconductor layer;

a wavelength converting layer on the n-type semiconductor layer on a surface opposite the active layer;

a p-type contact on the p-type semiconductor layer; and

one or more passivation layer extending from the p-type semiconductor layer to the n-type semiconductor layer and separating the n-type contact from the active layer and the p-type layer, the one or more passivation layer extending at least partially on a sidewall of the n-type semiconductor layer,

wherein the n-type contact extends to the wavelength converting layer and provides at least partial optical isolation between each pixel.

7. The LED array of claim 6 , wherein at least part of the wavelength converting layer is separated by the n-type contact in the trench.

8. The LED array of claim 7 , wherein the n-type contact in the trench forms a protrusion separating the wavelength converting layer on each pixel.

9. The LED array of claim 6 , wherein the active layer comprises a partially doped or undoped Type III-nitride.

10. The LED array of claim 6 , wherein the n-type layer and p-type layer are not continuous between the plurality of pixels.

Assignments (3)
PATENT SECURITY AGREEMENT SUPPLEMENT Recorded Jul 24, 2025
From: ADEIA SEMICONDUCTOR INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 072281/0565 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2025
From: LUMILEDS LLC
To: ADEIA SEMICONDUCTOR INC.
Reel/Frame 070936/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: TANDON, ASHISH; SHARMA, RAJAT; FLEMISH, JOSEPH; PAPOU, ANDREI; YU, WEN; YOUNG, ERIK WILLIAM; SHEN, YU-CHEN; GORDON, LUKE
To: LUMILEDS LLC
Reel/Frame 062426/0030 →