IP Library Granted Patent US 11,973,471
Granted Patent B2
US 11,973,471 · App. 18/158,791 · Granted Apr 30, 2024

Method and system for process and temperature compensation in a transimpedance amplifier using a dual replica

Inventors: Stefan Barabas (West Melbourne, FL); Joseph Balardeta (Encinitas, CA); Simon Pang (San Diego, CA); Scott Denton (Escondido, CA)
Assignee: Cisco Technology, Inc.
H03F1/30H01L31/02016H01L31/09H03F1/086H03F1/301H03F1/56H03F3/08H03F3/082H03F3/087H03G3/3084H03F2200/129H03F2200/132H03F2200/156H03F2200/453
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Quick Facts
Patent No.
US 11,973,471
App. No.
18/158,791
Granted
Apr 30, 2024
Kind
B2
Abstract

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

Claims (43)

1. A method comprising:

configuring a first gain level of a first TIA (transimpedance amplifier), wherein the first gain level comprises a constant gain level;

dynamically configuring a second gain level of a second TIA and a third TIA via respective active feedback impedances based on a control voltage; and

amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level.

2. The method of claim 1 , further comprising:

monitoring the output of the first TIA and the second TIA; and

configuring the first gain level of the first TIA based on a configurable feedback impedance.

3. The method of claim 1 , further comprising:

monitoring the output of the first TIA and the second TIA; and

configuring the first gain level of the first TIA based on a fixed feedback resistance of the first TIA and a reference current applied at an input to the first TIA.

4. The method of claim 1 , wherein the active feedback impedance of the second TIA includes an array of selectable resistors.

5. The method of claim 1 , wherein a first output of the first TIA and a second output of the second TIA are coupled to the active feedback impedance of the second TIA.

6. The method of claim 1 , further comprising:

compensating for changes in the second gain level due to a temperature of the second TIA via the active feedback impedance of the second TIA.

7. The method of claim 1 , wherein the active feedback impedance includes a fixed resistor and a voltage-controlled resistance.

8. The method of claim 1 , wherein the active feedback impedance of the third TIA includes a resistor in series with a transistor.

9. A transimpedance amplifier (TIA) circuit comprising:

a first TIA, a second TIA, and a third TIA, the first TIA, the second TIA and the third TIA each comprising a configurable feedback impedance, the configurable feedback impedances of the second TIA and the third TIA are both active feedback impedances; and

a control loop configured to:

configure a first gain level of a first TIA, wherein the first gain level comprises a constant gain level;

dynamically configure a second gain level of the second TIA and a third TIA via their respective active feedback impedances based on a control voltage; and

amplify a received electrical current to generate an output voltage using the third TIA according to the second gain level.

10. The TIA circuit of claim 9 , further comprising a gain stage including:

a first gain input coupled to a first output of the first TIA;

a second gain input coupled to a second output of the second TIA; and

a gain output coupled to the configurable feedback impedance of the second TIA and the third TIA.

11. The TIA circuit of claim 10 , wherein a reference current generates a reference voltage at one of the first gain input and the second gain input.

12. The TIA circuit of claim 11 , wherein the reference voltage controls the gain output.

13. The TIA circuit of claim 9 , wherein the control loop is further configured to compensate for changes in the second gain level based on temperature changes in at least one of the second TIA and the third TIA via the configurable feedback impedance.

14. The TIA circuit of claim 9 , wherein the configurable feedback impedance comprises:

a fixed resistor and a voltage-controlled resistance.

15. The TIA circuit of claim 9 , wherein the configurable feedback impedance is configurable via a gate voltage of a transistor of a voltage-controlled resistance.

16. A control loop configured to:

configure a first gain level of a first transimpedance amplifier (TIA), wherein the first gain level comprises constant gain level;

dynamically configure a second gain level of a second TIA and a third TIA via respective active feedback impedances based on a control voltage generated by the control loop, wherein the active feedback impedance of the second TIA includes a fixed resistor and a voltage-controlled resistance; and

amplify a received electrical current to generate an output voltage using the third TIA.

17. The control loop of claim 16 , further configured to:

monitoring the output of the first TIA and the second TIA; and

configuring the first gain level of the first TIA based on a configurable feedback impedance.

18. The control loop of claim 16 , wherein a first output of the first TIA and a second output of the second TIA are coupled to the active feedback impedance of the second TIA.

19. The control loop of claim 16 , further configured to:

compensate for changes in the second gain level due to a temperature of the second TIA via the active feedback impedance of the second TIA.

20. The control loop of claim 16 , wherein the active feedback impedance of the third TIA includes an array of selectable resistors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2023
From: LUXTERA LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 062470/0274 →
Continuity (5)
Continuation 17071950 · Oct 15, 2020
Continuation 16429952 · Jun 3, 2019
Continuation 14997940 · Jan 18, 2016
Provisional Application 62125292 · Jan 16, 2015
Related Publication 20230163729A1 · May 25, 2023