IP Library Granted Patent US 11,988,911
Granted Patent B2
US 11,988,911 · App. 18/169,391 · Granted May 21, 2024

Display device

Inventors: Gen Koide (Tokyo, JP); Shimpei Noshita (Tokyo, JP); Junichi Kitamura (Tokyo, JP)
Assignee: Japan Display Inc.
G02F1/13306G02F1/133514G02F1/1337G02F1/1343G02F1/13454G09G3/3225G09G3/3266G09G3/3275G02F1/136286G02F2201/56G09G3/3233
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Quick Facts
Patent No.
US 11,988,911
App. No.
18/169,391
Granted
May 21, 2024
Kind
B2
Abstract

In one embodiment, a display device includes a display area, a peripheral area, scanning lines, signal lines, a first driver in the peripheral area, and a second driver in the peripheral area. The display area has an arc-shaped corner. The first driver includes first and second buffers configured to apply voltage to the scanning lines, a first shift register unit configured to control the first buffer unit, and a second shift register unit configured to control the second buffer unit. At the corner, extension directions of the first buffer unit and the first shift register unit are equal to each other. Extension directions of the second buffer unit and the second shift register unit are different from each other.

Claims (40)

1. A display device comprising:

a first pixel row in a display area;

a second pixel row next to the first pixel row in the display area;

a first scanning line of the first pixel row;

a second scanning line of the second pixel row;

a scanning line driver including a first transistor connected to the first scanning line, and a second transistor connected to the second scanning line;

a first video signal line;

a second video signal line;

a first selector circuit connected to the first video signal line; and

a second selector circuit connected to the second video signal line,

wherein

the first scanning line extends between the first selector circuit and the second selector circuit,

the second scanning line extends between the first selector circuit and the second selector circuit, and

a first gap between the first scanning line and the second scanning line in a region between the first selector circuit and the second selector circuit is smaller than a second gap between the first scanning line and the second scanning line in the display area.

2. The display device of claim 1 , wherein

the first video signal line and the second video signal line are arrayed in a first direction in the display area,

the first scanning line and the second scanning line are arrayed in a second direction intersecting the first direction in the display area, and

the second selector circuit is displaced from the first selector circuit in the first direction and the second direction.

3. The display device of claim 2 , wherein

the first scanning line and the second scanning line extend parallel to each other in the region between the first selector circuit and the second selector circuit.

4. The display device of claim 2 , wherein

the first video signal line does not cross either of the first scanning line and the second scanning line, and

the second video signal line crosses each of the first scanning line and the second scanning line.

5. The display device of claim 2 , wherein

the first transistor and the second transistor are located outside of the display area,

the first transistor is located on an extension line of the second pixel row in the first direction, and

the second transistor is displaced from the extension line in the second direction.

6. The display device of claim 2 , wherein

the first selector circuit is connected to the second selector circuit by a connection line, and

the first scanning line and the second scanning line cross the connection line at the region between the first selector circuit and the second selector circuit.

7. The display device of claim 2 , wherein

the scanning line driver includes a first buffer circuit and a second buffer circuit,

the first buffer circuit includes the first transistor,

the second buffer circuit includes the second transistor, and

the first buffer circuit and the second buffer circuit are adjacent to each other in the second direction and are not displaced in the first direction.

8. The display device of claim 2 , wherein

the scanning line driver includes a first buffer circuit and a second buffer circuit,

the first buffer circuit includes the first transistor,

the second buffer circuit includes the second transistor, and

the first buffer circuit and the second buffer circuit are adjacent to each other in the first direction and are not displaced in the second direction.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2023
From: KOIDE, GEN; NOSHITA, SHIMPEI; KITAMURA, JUNICHI
To: JAPAN DISPLAY INC.
Reel/Frame 062707/0492 →
Priority Claims (1)
JP 2017-043028 · Mar 7, 2017 · national
Continuity (4)
Continuation 17365591 · Jul 1, 2021
Continuation 16879257 · May 20, 2020
Continuation 15908940 · Mar 1, 2018
Related Publication 20230194916A1 · Jun 22, 2023