Vector computation unit in a neural network processor
A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.
1. A vector computation unit for performing neural network computations comprising:
activation circuitry configured to:
receive a vector of accumulated values;
receive one or more control signals specifying an activation function; and
apply the activation function to the accumulated values to generate a vector of activation values; and
pooling circuitry configured to:
receive the activation values;
receive the one or more control signals specifying a pooling function; and
apply the pooling function to the activation values to generate a pooled value.
2. The vector computation unit of claim 1 , wherein the one or more control signals are provided by a sequencer.
3. The vector computation unit of claim 1 , wherein the accumulated values correspond to products of a matrix multiplication between a layer of the neural network and a parameter matrix for the layer.
4. The vector computation unit of claim 1 , further comprising normalization circuitry configured to:
receive the activation values;
receive the one or more control signals specifying a normalization function; and
apply the normalization function to the activation values to generate respective normalized values for each activation value.
5. The vector computation unit of claim 4 , wherein the pooling circuitry is further configured to:
receive the normalized values; and
apply the pooling function to the normalized values to generate the pooled value.
6. The vector computation unit of claim 1 , wherein the pooled value comprises at least one of a maximum, a minimum, or an average of the activation values, or a maximum, a minimum, or an average of a subset of the activate values.
7. The vector computation unit of claim 1 , wherein the pooling circuitry comprises multiple parallel pooling circuitries, each pool circuitry configured to receive a subset of the activation values to generate a respective pooled value.
8. The vector computation unit of claim 1 , further comprising a plurality of registers and a plurality of memory units configured to store the activation values.
9. A method for performing neural network computations comprising:
receiving, by activation circuitry, a vector of accumulated values and one or more control signals specifying an activation function;
applying, by the activation circuitry, the activation function to the accumulated values to generate a vector of activation values;
receiving, by pooling circuitry, the activation values and the one or more control signals specifying a pooling function; and
applying, by the pooling circuitry, the pooling function to the activation values to generate a pooled value.
10. The method of claim 9 , wherein the one or more control signals are provided by a sequencer.
11. The method of claim 9 , wherein the accumulated values correspond to products of a matrix multiplication between a layer of the neural network and a parameter matrix for the layer.
12. The method of claim 9 , further comprising:
receiving, by normalization circuitry, the activation values and the one or more control signals specifying a normalization function; and
applying, by the normalization circuitry, the normalization function to the activation values to generate respective normalized values for each activation value.
13. The method of claim 12 , further comprising:
receiving, by the pooling circuitry, the normalized values; and
applying, by the pooling circuitry, the pooling function to the normalized values to generate the pooled value.
14. The method of claim 9 , wherein the pooled value comprises at least one of a maximum, a minimum, or an average of the activation values, or a maximum, a minimum, or an average of a subset of the activate values.
15. The method of claim 9 , wherein the pooling circuitry comprises multiple parallel pooling circuitries, each pool circuitry configured to receive a subset of the activation values to generate a respective pooled value.
16. The method of claim 9 , further comprising storing the activation values in a plurality of registers and a plurality of memory units.
17. A non-transitory computer readable medium for storing instructions executable by a processor to perform neural network computations, the instructions comprising:
receiving, by activation circuitry, a vector of accumulated values and one or more control signals specifying an activation function;
applying, by the activation circuitry, the activation function to the accumulated values to generate a vector of activation values;
receiving, by pooling circuitry, the activation values and the one or more control signals specifying a pooling function; and
applying, by the pooling circuitry, the pooling function to the activation values to generate a pooled value.
18. The non-transitory computer readable medium of claim 17 , wherein the instructions further comprise:
receiving, by normalization circuitry, the activation values and the one or more control signals specifying a normalization function; and
applying, by the normalization circuitry, the normalization function to the activation values to generate respective normalized values for each activation value.
19. The non-transitory computer readable medium of claim 18 , wherein the instructions further comprise:
receiving, by the pooling circuitry, the normalized values; and
applying, by the pooling circuitry, the pooling function to the normalized values to generate the pooled value.
20. The non-transitory computer readable medium of claim 17 , wherein the instructions further comprise storing the activation values in a plurality of registers and a plurality of memory units.