IP Library Granted Patent US 12,199,586
Granted Patent B2
US 12,199,586 · App. 18/192,932 · Granted Jan 14, 2025

Capacitive isolator having common mode noise suppression

Inventors: John Horan (Cork, IE); Guillaume Aulagnier (Cannes, FR)
Assignee: Allegro MicroSystems, LLC
H03H7/427H03H7/0138H03K17/162
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Quick Facts
Patent No.
US 12,199,586
App. No.
18/192,932
Granted
Jan 14, 2025
Kind
B2
Abstract

Methods and apparatus for capacitively isolated first communication channels with common mode noise suppression. In embodiments, a driver on the first circuit transmits a data signal on the first communication channel to a receiver on the second circuit. A common mode suppression circuit on the second circuit is coupled to the receiver, output of the suppression circuit is coupled to a node between the first capacitor and the resistor network and an input is coupled to a ground of the first circuit via a second capacitor. The common mode suppression circuit is configured to detect a common mode movement signal due to a noise pulse to the second circuit on the input and generate a corresponding signal on the output to maintain a current level across the resistor network for suppressing common mode noise from the pulse.

Claims (20)

1. A system, comprising:

a capacitively isolated differential first communication channel connecting first and second circuits via first and second capacitors;

a first driver to transmit a positive data signal of a differential signal and a second driver to transmit a negative data signal of the differential signal from the first circuit on the first communication channel to a receiver on the second circuit via the first and second capacitors, wherein the first driver has a first path to ground via a third capacitor and the second driver has a second path to ground via a fourth capacitor, wherein the receiver comprises a resistor network having a first terminal coupled to the first capacitor and a second terminal coupled to the second capacitor; and

a common mode suppression circuit on the second circuit, wherein the common mode suppression circuit comprises first and second current mirrors coupled to the first and second drivers,

wherein the common mode suppression circuit is configured to detect a common mode movement signal due to a noise pulse to the second circuit on the input and generate a corresponding signal on the output to maintain a current level across the resistor network and suppress common mode movement in the second circuit in response to the noise pulse.

2. The system according to claim 1 , wherein the first current mirror comprises p-channel devices and the second current mirror comprises n-channel devices.

3. The system according to claim 1 , wherein the first current mirror is configured to mirror current through the third capacitor.

4. The system according to claim 3 , wherein the second current mirror is configured to mirror current through the fourth capacitor.

5. The system according to claim 4 , wherein the first and second current mirrors are configured to maintain current in the resistor network in response to common mode noise in the second circuit.

6. The system according to claim 5 , wherein the first current mirror is coupled to the third capacitor, the first driver, the second driver, the second current mirror, and the resistor network.

7. A method, comprising:

employing a capacitively isolated differential first communication channel connecting first and second circuits via first and second capacitors;

employing a first driver to transmit a positive data signal of a differential signal and a second driver to transmit a negative data signal of the differential signal from the first circuit on the first communication channel to a receiver on the second circuit via the first and second capacitors, wherein the first driver has a first path to ground via a third capacitor and the second driver has a second path to ground via a fourth capacitor, wherein the receiver comprises a resistor network having a first terminal coupled to the first capacitor and a second terminal coupled to the second capacitor; and

employing a common mode suppression circuit on the second circuit, wherein the common mode suppression circuit comprises first and second current mirrors coupled to the first and second drivers,

wherein the common mode suppression circuit is configured to detect a common mode movement signal due to a noise pulse to the second circuit on the input and generate a corresponding signal on the output to maintain a current level across the resistor network and suppress common mode movement in the second circuit in response to the noise pulse.

8. The method according to claim 7 , wherein the first current mirror comprises p-channel devices and the second current mirror comprises n-channel devices.

9. The method according to claim 7 , wherein the first current mirror is configured to mirror current through the third capacitor.

10. The method according to claim 9 , wherein the second current mirror is configured to mirror current through the fourth capacitor.

11. The method according to claim 10 , wherein the first and second current mirrors are configured to maintain current in the resistor network in response to common mode noise in the second circuit.

12. The method according to claim 11 , wherein the first current mirror is coupled to the third capacitor, the first driver, the second driver, the second current mirror, and the resistor network.

Assignments (2)
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2023
From: HORAN, JOHN; AULAGNIER, GUILLAUME; ALLEGRO MICROSYSTEMS FRANCE SAS; ALLEGRO MICROSYSTEMS EUROPE LIMITED; ALLEGRO MICROSYSTEMS IRELAND, LIMITED; HEYDAY INTEGRATED CIRCUITS
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 063170/0847 →
Continuity (1)
Related Publication 20240333247A1 · Oct 3, 2024
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