IP Library Patent Application 18194133
Patent Application
App. No. 18/194,133

EMITTER ASSEMBLY WITH LOCKING PILLARS

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Quick Facts
Patent No.
US None
App. No.
18/194,133
Abstract

In some implementations, an emitter assembly includes a vertical cavity surface emitting laser (VCSEL) chip including a plurality of VCSELs. The emitter assembly may include a plurality of conductive pillars electrically connected to the VCSEL chip. The emitter assembly may include a dummy pillar, electrically isolated from the VCSEL chip, mating with a slot. The VCSEL chip may include one of the dummy pillar or the slot.

Claims (44)

1 . An emitter assembly, comprising:

a vertical cavity surface emitting laser (VCSEL) chip comprising a plurality of VCSELs;

a plurality of conductive pillars electrically connected to the VCSEL chip; and

a dummy pillar, electrically isolated from the VCSEL chip, mating with a slot,

wherein the VCSEL chip includes one of the dummy pillar or the slot.

2 . The emitter assembly of claim 1 , wherein the slot comprises a hollow extension from the VCSEL chip.

3 . The emitter assembly of claim 1 , wherein a step is defined in the slot.

4 . The emitter assembly of claim 1 , further comprising:

a carrier,

wherein the plurality of conductive pillars electrically connect the VCSEL chip and the carrier.

5 . The emitter assembly of claim 4 , wherein the slot comprises a recess in a surface layer of the carrier.

6 . The emitter assembly of claim 4 , wherein the slot comprises a recess extending through a surface layer of the carrier into a base layer of the carrier.

7 . The emitter assembly of claim 4 , wherein the dummy pillar is electrically isolated from the VCSEL chip and electrically isolated from the carrier.

8 . The emitter assembly of claim 1 , wherein each of the plurality of conductive pillars has a maximum diameter less than 25 micrometers.

9 . An emitter assembly, comprising:

a vertical cavity surface emitting laser (VCSEL) chip comprising a plurality of VCSELs in a bottom-emitting configuration,

wherein the plurality of VCSELs are respectively associated with a plurality of first electrical contacts;

a carrier having a plurality of second electrical contacts,

wherein the VCSEL chip is in a flip chip configuration with the carrier;

a plurality of conductive pillars that electrically connect the plurality of first electrical contacts and the plurality of second electrical contacts; and

a dummy pillar that is electrically isolated from the plurality of first electrical contacts and the plurality of second electrical contacts,

wherein the dummy pillar extends from one of the VCSEL chip or the carrier and mates with a slot of the other of the VCSEL chip or the carrier.

10 . The emitter assembly of claim 9 , wherein the carrier comprises an integrated circuit chip or a substrate.

11 . The emitter assembly of claim 9 , wherein the carrier comprises a surface layer and a base layer, and

wherein the dummy pillar extends from one of the VCSEL chip or the surface layer and mates with the slot of the other of the VCSEL chip or the surface layer.

12 . The emitter assembly of claim 11 , wherein the surface layer comprises a redistribution layer configured to decrease a pitch of the plurality of second electrical contacts.

13 . The emitter assembly of claim 9 , wherein the plurality of conductive pillars extend from the VCSEL chip to the carrier, and

wherein the dummy pillar extends from the VCSEL chip.

14 . The emitter assembly of claim 9 , wherein the plurality of conductive pillars extend from the VCSEL chip to the carrier, and

wherein the dummy pillar extends from the carrier.

15 . The emitter assembly of claim 9 , wherein the plurality of conductive pillars extend from the carrier to the VCSEL chip, and

wherein the dummy pillar extends from the carrier.

16 . The emitter assembly of claim 9 , wherein the plurality of conductive pillars extend from the carrier to the VCSEL chip, and

wherein the dummy pillar extends from the VCSEL chip.

17 . The emitter assembly of claim 9 , wherein a spacing of the plurality of first electrical contacts defines a pitch that is less than 45 micrometers.

18 . A method, comprising:

assembling a vertical cavity surface emitting laser (VCSEL) chip in a flip chip configuration with a carrier to produce an emitter assembly,

wherein a plurality of conductive pillars electrically connect the VCSEL chip and the carrier, and

wherein one of the VCSEL chip or the carrier comprises a dummy pillar, electrically isolated from the VCSEL chip and the carrier, and the other of the VCSEL chip or the carrier comprises a slot for the dummy pillar; and

performing a solder reflow procedure on the emitter assembly.

19 . The method of claim 18 , wherein assembling the VCSEL chip in the flip chip configuration with the carrier comprises:

assembling the VCSEL chip in the flip chip configuration with the carrier such that the dummy pillar mates with the slot.

20 . The method of claim 18 , further comprising:

applying solder flux on the carrier prior to assembling the VCSEL chip in the flip chip configuration with the carrier.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2025
From: LUMENTUM OPERATIONS LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074974/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2023
From: SHI, WEI; LEIGH, JOSEPH; DAS, SUHIT RANJAN; ZHU, HUANLIN; SRINIVASAN, RAMAN; BACCHIN, GIANLUCA; LI, YUEFA; LOPEZ RUVALCABA, JACOB U.; ZHU, LIJUN; YU, QIANHUAN
To: LUMENTUM OPERATIONS LLC
Reel/Frame 063201/0032 →