Spare substitution in memory system
View Patent ↗Methods, systems, and devices for spare substitution in a memory system are described. A controller may, as part of a background operation, assign a spare bit to replace a bit of a code word and save an indication of the spare bit assignment in a memory array. The code word may include a set of bits that each correspond to a respective Minimum Substitution Region (MSR) within a memory medium that retains the code word. An MSR corresponding to the bit to be replaced may include a quantity of erroneous bits relative to a threshold. The controller may, during a read operation, identify the spare bit in a first portion of the code word, determine the bit to be replaced based on accessing the memory array, and replace the bit with the spare bit concurrently with receiving a second portion of the code word.
1. A method, comprising:
identifying an access command for a memory device;
generating a code word for the access command, the code word comprising a plurality of fields;
grouping bits of the code word into a plurality of groups, wherein bits of a first field of the plurality of fields are included in at least two of the plurality of groups, wherein each group of the plurality of groups corresponds to a respective arrangement of fields of a plurality of arrangements of fields, the plurality of arrangements of fields comprising a first arrangement of fields and a second arrangement of fields, wherein the first arrangement of fields comprises a first subset of bits of the first field and at least a subset of bits of a second field and the second arrangement of fields comprises a second subset of bits of the first field and at least a subset of bits of a third field; and
transferring, to the memory device based at least in part on the access command, the plurality of groups over a plurality of channels in a plurality of bursts according to the plurality of arrangements of fields, wherein a respective set of groups of the plurality of groups is transferred over each channel of the plurality of channels, and each group of the respective set of groups for a channel is transferred in a respective burst of the plurality of bursts.
2. The method of claim 1 , wherein the first arrangement of fields comprises one or more control fields and one or more spare fields.
3. The method of claim 1 , wherein at least two of the plurality of groups have a same arrangement of fields of the plurality of arrangements of fields.
4. The method of claim 1 , wherein the plurality of fields comprises a plurality of control fields and one or more data fields.
5. The method of claim 4 , wherein transferring the plurality of groups comprises transferring the plurality of control fields in a first burst of the plurality of bursts.
6. The method of claim 1 , wherein each of the plurality of groups comprises eight bits.
7. The method of claim 1 , wherein each of the plurality of groups comprises a determined quantity of the bits.
8. An apparatus, comprising:
a processor; and
a memory coupled with the processor and comprising instructions which, when executed by the processor, cause the apparatus to:
identify an access command for a memory device;
generate a code word for the access command, the code word comprising a plurality of fields;
group bits of the code word into a plurality of groups, wherein bits of a first field of the plurality of fields are included in at least two of the plurality of groups, and wherein each group of bits corresponds to one of a plurality of arrangements of fields, the plurality of arrangements of fields comprising a first arrangement of fields and a second arrangement of fields, and wherein the first arrangement of fields comprises a first subset of bits of the first field and at least a subset of bits of a second field and the second arrangement of fields comprises a second subset of bits of the first field and at least a subset of bits of a third field; and
transfer, to the memory device for the access command, the plurality of groups over a plurality of channels in a plurality of bursts according to the plurality of arrangements of fields, wherein a respective set of groups of the plurality of groups is transferred over each channel of the plurality of channels, and wherein each group of the respective set of groups for a channel is transferred in a respective burst of the plurality of bursts.
9. The apparatus of claim 8 , wherein the first arrangement of fields comprises one or more control fields and one or more spare fields.
10. The apparatus of claim 8 , wherein at least two of the plurality of groups have a same arrangement of fields of the plurality of arrangements of fields.
11. The apparatus of claim 8 , wherein the plurality of fields comprises a plurality of control fields and one or more data fields.
12. The apparatus of claim 11 , wherein the instructions for transferring the plurality of groups comprises instructions which, when executed by the processor, cause the apparatus to transfer the plurality of control fields in a first burst of the plurality of bursts.
13. The apparatus of claim 8 , wherein each of the plurality of groups comprises eight bits.
14. The apparatus of claim 8 , wherein each of the plurality of groups comprises a determined quantity of the bits.
15. A method, comprising:
receiving, from a memory device based at least in part on an access command, a code word over a plurality of channels in a plurality of bursts, the code word comprising a plurality of fields, wherein bits of the code word are grouped into a plurality of groups, and bits of a first field of the plurality of fields are included in at least two of the plurality of groups,
wherein each group of the plurality of groups corresponds to a respective arrangement of fields of a plurality of arrangements of fields, the plurality of arrangements of fields comprising a first arrangement of fields and a second arrangement of fields,
wherein the first arrangement of fields comprises a first subset of bits of the first field and at least a subset of bits of a second field and the second arrangement of fields comprises a second subset of bits of the first field and at least a subset of bits of a third field,
wherein the code word is received over the plurality of channels in the plurality of bursts according to the plurality of arrangements of fields, and
wherein a respective set of groups of the plurality of groups is received over each channel of the plurality of channels, and wherein each group of the respective set of groups for a channel is received in a respective burst of the plurality of bursts; and
parsing the code word received over the plurality of channels in the plurality of bursts into the plurality of fields.
16. The method of claim 15 , further comprising:
reconstituting the code word comprising the plurality of fields.
17. The method of claim 16 , wherein:
receiving the code word comprises:
receiving a first portion of the code word during a first burst of the plurality of bursts; and
receiving a second portion of the code word during a second burst of the plurality of bursts; and
reconstituting the code word comprises:
replacing the second subset of bits of the second field with the first subset of bits of the first field concurrent with receiving the second portion of the code word.
18. The method of claim 15 , wherein:
receiving the code word comprises:
receiving a first portion of the code word during a first burst of the plurality of bursts; and
receiving a second portion of the code word during a second burst of the plurality of bursts; and
parsing the code word comprises:
parsing the first portion of the code word concurrent with receiving the second portion of the code word.
19. The method of claim 15 , wherein the first arrangement of fields comprises one or more control fields and one or more spare fields.
20. The method of claim 15 , wherein at least two of the plurality of groups have a same arrangement of fields of the plurality of arrangements of fields.