Granted Patent B1

US 12,524,936 · App. 18/231,959 · Granted Jan 13, 2026

Inventors: Alexander Fafard (Rochester, NY); Austin Fletcher (Keego Harbor, MI)

Assignee: Two Six Labs, LLC

G06T11/206G06T7/0004G06T2207/30141

Abstract

Claims (68)

1 . A method for analyzing a circuit representation for generating a graph of interconnected components, comprising:

scanning a functional rendering of a circuit for identifying a plurality of windows, each window depicting a location of a respective component of a plurality of components in the circuit;

scanning the functional rendering for identifying connections between the windows; and

generating a graph indicative of circuit elements and traces interconnecting the circuit elements based on coalescing the plurality of windows with the identified connections, coalescing including mapping each of the connections to a plurality of the windows, each of the mapped connections indicative of a trace between the components in the respective windows, mapping the connection including:

subtracting the windows from the functional rendering;

identifying traces in the functional rendering;

for each trace, computing connections based on a correspondence of a location of a window and a location of a termination of the trace, by:

computing a path defined by a trace:

identifying a closest window to the path, the window indicative of the corresponding component;

traversing a plurality of directions from the path;

determining if any of the plurality of directions connects to the window; and

determining connectivity of the trace based on an alignment of the path with the direction connecting to the window.

2 . The method of claim 1 further comprising identifying a plurality of connections, each connection extending from a first window of the plurality of windows to at least one other window of the plurality of windows.

3 . The method of claim 1 wherein mapping the connection includes:

determining an endpoint of the connection, and

computing a distance to a nearest component from the endpoint.

4 . The method of claim 1 further comprising:

computing connectivity based on a trace continuously extending between windows; and

storing the computed connectivity in a connectivity matrix of components based on the components located within the respective windows.

5 . The method of claim 1 wherein the traversed directions include an 8-way connected component analysis from a position on the path.

6 . The method of claim 1 wherein coalescing further comprises:

determining, for each connection, a plurality of endpoints corresponding to the connection;

determining, for each endpoint of the plurality of endpoints, a location of the endpoints of the connection; and

computing connectivity of a connection based on a correspondence between the location of the endpoint and the location of a respective window.

7 . The method of claim 1 further comprising:

identifying, for each window, a set of connected traces from the traces determined to connect to the window;

forming a stacked plane representation of each window and the connected traces;

determining connectivity between components based on a correspondence of a location of the connected traces between a plurality of the windows; and

storing an entry indicative of the connection between the components corresponding to the windows when a connected trace from the set of connected traces from two or more windows align.

8 . The method of claim 1 further comprising identifying, for each of the windows, a component type indicative of the component occupying the window.

9 . The method of claim 1 wherein the functional rendering includes a raster representation of an image, schematic, diagram, alphanumeric or symbolic representation of a plurality of components and at least one connection between the plurality of components.

10 . The method of claim 9 wherein the function rendering is a two dimensional depiction of a PCB (printed circuit board).

11 . The method of claim 8 further comprising:

determining, based on the component type, a polarity indicative of current flow to each respective connection; and

generating a directed graph indicative of a direction of current flow on each respective connection.

12 . The method of claim 1 further comprising:

determining an intersection between a first trace and a second trace;

concluding that the intersection defines an electrical conductivity between the traces; and

defining the intersection as a component and the intersection traces as connections to the defined component.

13 . A device for analyzing a circuit representation for generating a graph of interconnected components, comprising:

a scan interface for scanning a functional rendering of a circuit for identifying a plurality of windows each depicting a location of a respective component of a plurality of components in the circuit;

an application configured to:

identify, for each of the windows, a component type indicative of the component occupying the window;

analyze the scan of the functional rendering for identifying connections between the windows; and

generate a graph indicative of circuit elements and traces based on coalescing the plurality of windows with the identified connections, coalescing including mapping each of the connections to a plurality of the windows, each of the mapped connections indicative of a trace between the components in the respective windows, the application further configured to:

subtract the windows from the functional rendering;

identify traces in the functional rendering;

for each trace, compute connections based on a correspondence of a location of a window and a location of a termination of the trace, by:

compute a path defined by a trace;

identify a closest window to the path, the window indicative of the corresponding component;

traverse a plurality of directions from the path;

determine if any of the plurality of directions connects to the window; and

determine connectivity of the trace based on an alignment of the path with the direction connecting to the window; and

a rendering device for displaying the generated graph.

14 . The device of claim 13 , wherein the application is further configured to identify a plurality of connections, each connection extending from a first window of the plurality of windows to at least one other window of the plurality of windows.

15 . The device of claim 13 , further comprising a connectivity matrix for storing the identified connections between the components based on the components located within the respective windows.

16 . A computer program embodying program code on a non-transitory computer readable storage medium that, when executed by a processor, performs steps for implementing a method for analyzing a circuit representation for generating a graph of interconnected components, the method comprising:

scanning a functional rendering of a circuit for identifying a plurality of windows, each window depicting a location of a respective component of a plurality of components in the circuit;

scanning the functional rendering for identifying connections between the windows; and

generating a graph indicative of circuit elements and traces interconnecting the circuit elements based on coalescing the plurality of windows with the identified connections, coalescing including mapping each of the connections to a plurality of the windows, each of the mapped connections indicative of a trace between the components in the respective windows, mapping the connection further including:

subtracting the windows from the functional rendering;

identifying traces in the functional rendering;

for each trace, computing connections based on a correspondence of a location of a window and a location of a termination of the trace, by:

computing a path defined by a trace;

identifying a closest window to the path, the window indicative of the corresponding component;

traversing a plurality of directions from the path;

determining if any of the plurality of directions connects to the window; and

determining connectivity of the trace based on an alignment of the path with the direction connecting to the window.

Assignments (2)

References Cited (8)