SYSTEM AND METHOD MEMORY OPTIMIZATION FOR MULTI-USER RLC

1 . A method, comprising:

sending, by processing circuitry, a packet to a user equipment (UE) to begin acknowledged mode (AM) between a distributed unit (DU) and the UE;

in response to the packet being received, allocating, by the processing circuitry, a packet chunk included in a common memory pool to the UE being sent the packet from the (DU); and

in response to the AM being successfully completed, returning, by the processing circuitry, the packet chunk to the common memory pool.

2 . The method of claim 1 , further comprising:

before the sending the packet to the UE to begin the AM between the DU and the UE creating, by the processing circuitry, N number of packet chunks, where N is a positive integer, included in the common memory pool.

3 . The method of claim 2 , further comprising:

creating, by the processing circuitry, M sectors, where M is a positive integer, of packet chunks where the N number of packet chunks are distributed over the M sectors.

4 . The method of claim 3 , further comprising:

distributing, by the processing circuitry, X number of UEs, where X is a positive integer, per sector.

5 . The method of claim 1 , further comprising:

requesting, by the processing circuitry, an additional packet chunk for the UE, based on a next requested packet being sent to the UE, which exceeds a packet size of the packet chunk.

6 . The method of claim 5 , wherein:

the packet size of the packet chunk and the additional packet chunk is Q packets, where Q is a positive integer; and

the next requested packet is an (Q+P) th packet received, where P is a positive integer.

7 . The method of claim 5 , further comprising:

linking, by the processing circuitry, the additional packet chunk to the packet chunk.

8 . The method of claim 1 , further comprising:

before the returning the packet chunk to the common memory pool, removing packet pointers from the packet chunk.

9 . An apparatus, comprising:

a processor; and

a memory having instructions stored thereon that, in response to being executed by the processor, cause the processor to:

send, by processing circuitry, a packet to a user equipment (UE) to begin acknowledged mode (AM) between a distributed unit (DU) and the UE;

in response to the packet being received, allocate, by the processing circuitry, a packet chunk included in a common memory pool to the UE being sent the packet from the (DU); and

in response to the AM being successfully completed, return, by the processing circuitry, the packet chunk to the common memory pool.

10 . The apparatus of claim 9 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

before the sending the packet to the UE to begin the AM between the DU and the UE create, by the processing circuitry, N number of packet chunks, where N is a positive integer, included in the common memory pool.

11 . The apparatus of claim 10 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

create, by the processing circuitry, M sectors, where M is a positive integer, of packet chunks where the N number of packet chunks are distributed over the M sectors.

12 . The apparatus of claim 11 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

distribute, by the processing circuitry, X number of UEs, where X is a positive integer, per sector.

13 . The apparatus of claim 9 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

request, by the processing circuitry, an additional packet chunk for the UE, based on a next requested packet being sent to the UE, which exceeds a packet size of the packet chunk.

14 . The apparatus of claim 13 , wherein:

the packet size of the packet chunk and the additional packet chunk is Q packets, where Q is a positive integer; and

the next requested packet is a (Q+P) th packet received, where P is a positive integer.

15 . The apparatus of claim 13 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

link, by the processing circuitry, the additional packet chunk to the packet chunk.

16 . The apparatus of claim 1 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

before the returning the packet chunk to the common memory pool, remove packet pointers from the packet chunk.

17 . A non-transitory computer readable medium having instructions stored thereon that, in response to being executed by a processor, cause the processor to:

send, by processing circuitry, a packet to a user equipment (UE) to begin acknowledged mode (AM) between a distributed unit (DU) and the UE;

in response to the packet being received, allocate by the processing circuitry, a packet chunk included in a common memory pool to the UE being sent the packet from the (DU); and

in response to the AM being successfully completed, return, by the processing circuitry, the packet chunk to the common memory pool.

18 . The non-transitory computer readable medium of claim 17 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

before the sending the packet to the UE to begin the AM between the DU and the UE create, by the processing circuitry, N number of packet chunks, where N is a positive integer, included in the common memory pool.

19 . The non-transitory computer readable medium of claim 18 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

create, by the processing circuitry, M sectors, where M is a positive integer, of packet chunks where the N number of packet chunks are distributed over the M sectors.

20 . The non-transitory computer readable medium of claim 19 , wherein the instructions, in response to being executed by the processor, further cause the processor to:

distribute, by the processing circuitry, X number of UEs, where X is a positive integer, per sector.