IP Library Granted Patent US 12,632,352
Granted Patent B2
US 12,632,352 · App. 18/249,892 · Granted May 19, 2026

Dynamic CPU allocation on failover

Inventors: Tushar Anil Doshi (Santa Clara, CA); Arumugam Nallasivam (Bangalore, IN); Ashok Kumar Mishra (San Jose, CA)
Assignee: Rakuten Symphony, Inc.
G06F11/203G06F11/1484G06F11/2035G06F2201/85
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Quick Facts
Patent No.
US 12,632,352
App. No.
18/249,892
Granted
May 19, 2026
Kind
B2
Abstract

Upon failure of a host and, in response to a lack of hots having available processing units, a host is selected and one or more processing units of the selected host are allocated as shared CPUs for use by one or more components of the failed host. The selected host may be selected according to requirements, such as affinity, anti-affinity, and latency. The shared CPUs may have been previously allocated as a dedicated CPU. The shared CPUs may be bound to the one or more components. The one or more components may include a container.

Claims (35)

1 . An apparatus comprising:

a computing device including one or more processing devices and one or more memory devices operably coupled to a plurality of processing devices, the one or more memory devices storing executable code that, when executed by the one or more processing devices, causes the one or more processing devices to:

detect that a plurality of hosts lack processing units available for allocation; and

in response to detecting that the plurality of hosts lack processing units available for allocation:

select a selected host of the plurality of hosts; and

invoke instantiation of a first component using one or more previously-allocated processing units of the selected host that were previously dedicated to a second component by:

adding the one or more previously-allocated processing units to a shared set of processing units;

instantiating the first component on the selected host; and

binding the first component to the one or more previously-allocated processing units such that both of the first component and the second component are bound to the one or more previously-allocated processing units.

2 . The apparatus of claim 1 , wherein the executable code, when executed by the plurality of processing devices, causes the one or more processing devices to select the selected host according to an affinity requirement for the first component.

3 . The apparatus of claim 1 , wherein the executable code, when executed by the plurality of processing devices, causes the one or more processing devices to select the selected host according to an anti-affinity requirement for the first component.

4 . The apparatus of claim 1 , wherein the executable code, when executed by the plurality of processing devices, causes the one or more processing devices to select the selected host according to a latency requirement for the first component.

5 . The apparatus of claim 1 , wherein the first component is a container.

6 . The apparatus of claim 1 ,

wherein the executable code, when executed by the plurality of processing devices, causes the one or more processing devices to select the selected host in response to detecting failure of a host of the plurality of hosts executing a third component.

7 . The apparatus of claim 1 , wherein the executable code, when executed by the plurality of processing devices, causes the one or more processing devices to invoke instantiation of the first component by a KUBERNETES Kubelet.

8 . The apparatus of claim 1 , wherein the one or more previously-allocated processing units belong to a plurality of processing units of the selected host.

9 . The apparatus of claim 8 , wherein the plurality of processing units are a plurality of processor cores on a common chip.

10 . A method comprising:

detect, by a computer system, that a plurality of hosts lack processing units available for allocation; and

in response to detecting that the plurality of hosts lack processing units available for allocation:

selecting, by the computer system, a selected host of the plurality of hosts; and

invoking, by the computer system, instantiation of a first component using one or more previously-allocated processing units of the selected host that were previously dedicated to a second component by:

adding the one or more previously-allocated processing units to a shared set of processing units;

instantiating the first component on the selected host; and

binding the first component to the one or more previously-allocated processing units such that both of the first component and the second component are bound to the one or more previously-allocated processing units.

11 . The method of claim 10 , further comprising selecting, by the computer system, the selected host according to an affinity requirement for the first component.

12 . The method of claim 10 , further comprising selecting, by the computer system, the selected host according to an anti-affinity requirement for the first component.

13 . The method of claim 10 , further comprising selecting, by the computer system, the selected host according to a latency requirement for the first component.

14 . The method of claim 10 , wherein the first component is a container.

15 . The method of claim 10 , further comprising:

selecting, by the computer system, the selected host in response to detecting failure of a host of the plurality of hosts executing a third component.

16 . The method of claim 10 , further comprising invoking, by the computer system, instantiation of the first component by a KUBERNETES Kubelet.

17 . The method of claim 10 , wherein the one or more previously-allocated processing units belong to a plurality of processing units of the selected host.

18 . The method of claim 17 , wherein the plurality of processing units are a plurality of processor cores on a common chip.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2024
From: ROBIN SOFTWARE DEVELOPMENT CENTER INDIA PRIVATE LIMITED
To: RAKUTEN SYMPHONY, INC.
Reel/Frame 068127/0299 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2024
From: ROBIN SYSTEMS, INC.
To: RAKUTEN SYMPHONY, INC.
Reel/Frame 068193/0367 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2023
From: DOSHI, TUSHAR ANIL; NALLASIVAM, ARUMUGAM; MISHRA, ASHOK KUMAR
To: ROBIN SYSTEMS, INC; ROBIN SOFTWARE DEVELOPMENT CENTER INDIA PRIVATE LIMITED
Reel/Frame 063391/0756 →
Continuity (1)
Related Publication 20250298705A1 · Sep 25, 2025
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