Multi-level hysteresis voltage controllers for voltage modulators and methods for control thereof

1. A multi-level cascaded voltage modulator, comprising:

a plurality of cells connected in series, wherein each cell comprises a switch and a storage element;

a cell rotation value generator that receives, as input, a signal based on an output of a voltage hysteresis block and generates, in response to the signal, a cell rotation value;

a switching signals generator that receives, as input, an input signal based on a voltage level signal and the cell rotation value, and in response, generates a set of switching signals, wherein each switching signal is respectively generated for a respective cell of the plurality of cells; and

wherein the switching signals are respectively applied to the respective switches of the respective cells.

2. The multi-level cascade voltage modulator of claim 1 , wherein:

the plurality of cells comprise N cells;

the switching signals generator can generate a plurality of different sets of switching signals, and each set of switching signals generated by the switching signals generator, when applied to the respective switches of the respective cells, cause from 0 to N of the cells to each output a positive DC voltage VDC; and

the cell rotation value generated by the cell rotation value generator, when applied to the switching signals generator, specifies respective sets of switching signals for 1 to N−1 cells to each output the voltage VDC.

3. The multi-level cascaded voltage modulator of claim 2 , wherein the cell rotation value generator further comprises:

a first multiplexer switch that receives, as input, an output value from 1 to N and generates, in response to the output value, the cell rotation value.

4. The multi-level cascaded voltage modulator of claim 3 , wherein the cell rotation value generator further comprises:

a counter, wherein the counter generates the output value from 1 to N based on the signal that is based on the output of the voltage hysteresis block and a reset signal.

5. The multi-level cascaded voltage modulator of claim 4 , wherein the cell rotation value generator further comprises:

a comparator, wherein the comparator compares an N value and the output value from 1 to N and, in response, generates the reset signal.

6. The multi-level cascaded voltage modulator of claim 2 , wherein the switching signals generator further comprises:

a second multiplexer switch that receives, as input, respective rotation block outputs of a plurality of rotation block generators and an output signal of a summation block, and in response, generates the set of switching signals.

7. The multi-level cascaded voltage modulator of claim 6 , wherein the switching signals generator further comprises:

the summation block, wherein the summation blocks receives the voltage level signal and a static value, and in response, generates the output signal of the summation block; and

the plurality of rotation blocks, wherein each rotation block generates a respective rotation block output.

8. The multi-level cascaded voltage modulator of claim 7 , wherein each rotation block of the plurality of rotation blocks receives the cell rotation value as input and in response, generates a respective set of switching signals based on the cell rotation value.

9. The multi-level cascaded voltage modulator of claim 8 , wherein each cell rotation value specifies a number of active cells and a position of the active cells, wherein each active cell outputs the voltage VDC.

10. A method performed in a voltage modulator, comprising:

receiving a hysteresis state signal that is generated based on a voltage sensed on a load;

generating, in response to the hysteresis state signal, a cell rotation value;

receiving an input signal based on a voltage level signal;

generating, in response to the voltage level signal and the cell rotation value, a set of switching signals, wherein each switching signal is respectively generated for a respective cell of a plurality of cells connected in series, wherein each cell comprises a switch and a storage element; and

wherein the switching signals are respectively applied to the respective switches of the respective cells to generate an output voltage for the load.

11. The method of claim 10 , wherein:

the plurality of cells comprise N cells;

generating, in response to the voltage level signal and the cell rotation value, a set of switching signals comprises generating one of a plurality sets of switching signals, wherein each set of set of switching signals, when applied to the respective switches of the respective cells, cause from 0 to N of the cells to each output a positive DC voltage VDC; and

the cell rotation value specifies respective sets of switching signals for 1 to N−1 cells to each output the voltage VDC.

12. The method of claim 11 , wherein each cell rotation value specifies a number of active cells and a position of the active cells, wherein each active cell outputs the voltage VDC.

13. The method of claim 11 , wherein generating, in response to the voltage level signal and the cell rotation value, a set of switching signals, comprises:

selecting, by the cell rotation value, a plurality of sets of switching signals, wherein each set of switching signals defines a specific number of up to N−1 cells to output the voltage VDC; and

selecting, based on the voltage level signal, one set of the plurality of sets of switching signals.