Low-power fast-transient large current-sink with dynamic biasing

1. A current-sink comprising:

a latch system including a latch system input coupled to and operable to receive a transient load current signal indicating a transient load current in a load current of a load coupled to a floating-rail, and a latch system output, wherein the latch system comprises:

a comparator having a non-inverting input coupled to a floating-rail reference voltage (V SSHV_REF ), and an inverting input coupled to a floating-rail voltage (V SSHV ) on the floating-rail, and a comparator output, and

a set-reset (S-R) latch having a set input coupled to and operable to receive the transient load current signal from the latch system input, a reset input coupled to the comparator output, and a latch output coupled to the latch system output; and

a current sinking switch including a gate coupled to the latch system output, a first source/drain (S/D) terminal coupled to the floating-rail, and a second S/D terminal coupled to ground, the current sinking switch operable to sink at least a portion of the transient load current from the load to provide a stable floating-rail voltage (V SSHV ) on the floating-rail.

2. The current-sink of claim 1 , further comprising a sinking capacitor coupled in parallel with the current sinking switch between the floating-rail and ground, wherein the transient load current includes a current spike and a lower, steady current, and wherein the sinking capacitor is operable to sink the current spike in transients load current to ground, and the current sinking switch is operable to sink the lower, steady current of the transient load current.

3. The current-sink of claim 1 , wherein the latch system further comprises a dynamic biasing circuit coupled between the latch output and biasing voltage inputs to the comparator, the dynamic biasing circuit operable to receive a bias enable signal from the latch output and bias the comparator to increase its speed and accuracy therefrom to reset the S-R latch and stop the current sinking phase.

4. The current-sink of claim 3 , wherein the latch system further comprises:

a logic-gate including a logic-gate output coupled to the reset input of the S-R latch, a first logic-gate input coupled to the comparator output and a second logic-gate input; and

a pulse generator including a pulse generator input coupled to and operable to receive the transient load current signal from latch system input, a pulse generator output coupled to the set input of the S-R latch, and coupled through an inverter to the second logic-gate input of the logic-gate,

wherein the pulse generator is operable in response to the transient load current signal to output through the pulse generator output a pulse to set the S-R latch to generate the bias enable signal on the latch output and turn on the current sinking switch.

5. The current-sink of claim 4 , wherein the dynamic biasing circuit is operable to be enabled only when the bias enable signal is received from the latch output so that quiescent currents through the dynamic biasing circuit and the comparator are minimized.

6. The current-sink of claim 1 , wherein the comparator comprises a folded-cascode topology and is operable with a 0V floating-rail voltage (V SSHV ) on the inverting input.

7. The current-sink of claim 1 , wherein the load coupled to the floating-rail comprises a switching regulator (SR) or power management unit (PMU).

8. A current-sink comprising a latch system including a set-reset (S-R) latch having a latch output coupled to a control gate of a current sinking switch coupled between a floating-rail and ground, wherein:

the latch system further comprises:

a comparator having a first comparator input coupled to a floating-rail reference voltage (V SSHV_REF ), a second comparator input coupled to a floating-rail voltage (V SSHV ) on the floating-rail, and a comparator output coupled to a reset input of the S-R latch, the comparator operable to reset the S-R latch when a difference between V SSHV_REF and V SSHV is less than a predetermined voltage; and

a dynamic biasing circuit coupled between the latch output and the comparator, the dynamic biasing circuit operable to receive a bias enable signal from the latch output and bias the comparator to generate an output to reset the S-R latch when a difference between V SSHV_REF and V SSHV is less than a predetermined voltage;

the latch system is operable to set the S-R latch when a transient load current signal indicating a transient load current in a load coupled to the floating-rail is received;

the S-R latch is operable to output from the latch output a voltage turning on the current sinking switch; and

the current sinking switch is operable to sink at least a portion of the transient load current from the load to provide a stable floating-rail voltage (V SSHV ) on the floating-rail.

9. The current-sink of claim 8 , wherein the latch system further comprises:

a logic-gate including a logic-gate output coupled to the reset input of the S-R latch, a first logic-gate input coupled to the comparator output and a second logic-gate input; and

a pulse generator including a pulse generator input operable to receive the transient load current signal, a pulse generator output coupled to a set input of the S-R latch, and through an inverter to the second logic-gate input of the logic-gate,

wherein the pulse generator is operable in response to the transient load current signal to output a pulse to set the S-R latch.

10. The current-sink of claim 9 , wherein the pulse generator and the inverter are operable to output a logic ‘1’ to the second logic-gate input after the pulse has ended.

11. The current-sink of claim 10 , wherein the comparator is operable to output a logic ‘1’ to the first logic-gate input when a difference between V SSHV_REF and V SSHV is less than a predetermined voltage, resetting the set the S-R latch and turning off the current sinking switch.