Granted Patent B2

US 12,237,772 · App. 18/307,631 · Granted Feb 25, 2025

Inventor: Gary Chunshien Wu (San Diego, CA)

Assignee: Murata Manufacturing Co., Ltd.

H02M3/1584H02M1/0045H02M1/08H03K3/037H02M3/07

Abstract

Claims (60)

1. A plurality of floating charge circuits, each including:

(a) a power input configured to be coupled to one of a source of a boosted input voltage or a power output from a preceding adjacent floating charge circuit;

(b) a first reference input configured to be coupled to one of source of an input voltage or to a second reference input from the preceding adjacent floating charge circuit;

(c) a power output configured to be coupled to a first terminal of a bootstrap capacitor and to a supply terminal of a level-shifter circuit;

(d) a second reference input configured to be coupled to a second terminal of the bootstrap capacitor, to a reference terminal of the level-shifter circuit, and to a terminal of a power switch;

(e) a first sub-circuit configured to pre-charge the bootstrap capacitor; and

(f) a second sub-circuit configured to transfer charge between the bootstrap capacitor and a bootstrap capacitor coupled to a subsequent adjacent floating charge circuit.

2. The plurality of floating charge circuits of claim 1 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

3. The plurality of floating charge circuits of claim 1 , wherein the first sub-circuit includes:

(a) a series-coupled first switch and resistor coupled between the power input and the power output;

(b) a first level shifter coupled to the first switch and configured to close the first switch while a voltage across the bootstrap capacitor is insufficient to enable operation of the power switch; and

(c) a voltage detector coupled between the power output and the second reference input and including an output control signal coupled to the input of the first level shifter.

4. The plurality of floating charge circuits of claim 1 , wherein the second sub-circuit includes:

(a) a second switch coupled between the power input and the power output; and

(b) a second level shifter coupled to the second switch and configured to close the second switch periodically to transfer charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

5. The plurality of floating charge circuits of claim 4 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

6. The plurality of floating charge circuits of claim 1 ,

(a) wherein the first sub-circuit includes:

(1) a series-coupled first switch and resistor coupled between the power input and the power output;

(2) a first level shifter including an input, an output coupled to and controlling the first switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input; and

(3) a voltage detector coupled between the power output and the second reference input and including an output control signal coupled to the input of the first level shifter; and

(b) wherein the second sub-circuit includes:

(1) a second switch coupled in series between the power input and the power output; and

(2) a second level shifter including an input configured to be coupled to a control signal for controlling the transfer of charge, an output coupled to and controlling the second switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input.

7. The plurality of floating charge circuits of claim 6 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

8. A floating charge circuit configured to be coupled to a bootstrap capacitor, including:

(a) a power input configured to be coupled to one of a source of a boosted input voltage or a power output from a preceding adjacent floating charge circuit;

(b) a first reference input configured to be coupled to one of an input voltage or to a second reference input from the preceding adjacent floating charge circuit;

(c) a power output configured to be coupled to a first terminal of the bootstrap capacitor; and

(d) a second reference input configured to be coupled to a second terminal of the bootstrap capacitor;

wherein the floating charge circuit includes a first sub-circuit including a first switch and resistor coupled in series between a power input and a power output coupled to the bootstrap capacitor and configured to pre-charge the bootstrap capacitor when coupled;

wherein the floating charge circuit includes a second sub-circuit configured to transfer charge between the bootstrap capacitor and a bootstrap capacitor coupled to a subsequent adjacent floating charge circuit.

9. The floating charge circuit of claim 8 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

10. The floating charge circuit of claim 8 , wherein the first sub-circuit includes:

(a) a series-coupled first switch and resistor coupled between the power input and the power output;

(b) a first level shifter including an input, an output coupled to and controlling the first switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input; and

(c) a voltage detector coupled between the power output and the second reference input, the voltage detector including an output control signal coupled to the input of the first level shifter.

11. The floating charge circuit of claim 8 , wherein the second sub-circuit includes:

(a) a second switch coupled between the power input and the power output; and

(b) a second level shifter including an input configured to receive a control signal for controlling the transfer of charge, an output coupled to and controlling the second switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input.

12. The floating charge circuit of claim 11 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

13. The floating charge circuit of claim 8 ,

(a) wherein the first sub-circuit includes:

(1) a series-coupled first switch and resistor coupled between the power input and the power output;

(2) a first level shifter including an input, an output coupled to and controlling the first switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input; and

(3) a voltage detector coupled between the power output and the second reference input and including an output control signal coupled to the input of the first level shifter; and

(b) wherein the second sub-circuit includes:

(1) a second switch coupled between the power input and the power output; and

(2) a second level shifter including an input configured to receive a control signal for controlling the transfer of charge, an output coupled to and controlling the second switch, an input voltage terminal coupled to the power input, a first reference terminal coupled to the first reference input, an output voltage terminal coupled to the power output, and a second reference terminal coupled to the second reference input.

14. The floating charge circuit of claim 13 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the subsequent adjacent floating charge circuit.

15. A method for providing a bootstrap power supply for a plurality of tiers of level-shifter/driver (LS/D) circuits for a power converter, including:

(a) in a startup mode, providing a pre-charging pathway from a boosted power supply to a bootstrap capacitor in each tier until the bootstrap capacitor in each tier is charged to a minimum voltage; and

(b) in an operational mode, connecting the bootstrap capacitors in adjacent tiers to allow charge to be rebalanced between the connected bootstrap capacitors.

16. The method of claim 15 , further including detecting a voltage across the bootstrap capacitor in each tier and disabling the pre-charging pathway to the bootstrap capacitor in each tier after that bootstrap capacitor is charged to the minimum voltage.

17. The method of claim 15 , wherein the pre-charging pathway from the boosted power supply is current limited.

18. The method of claim 15 , further including, for each tier of the plurality of tiers:

(a) providing a first sub-circuit configured to pre-charge the bootstrap capacitor; and

(b) providing a second sub-circuit configured to transfer charge between the bootstrap capacitor and a bootstrap capacitor coupled to an adjacent tier.

19. The method of claim 18 , wherein the first sub-circuit includes a first switch and resistor coupled in series between a power input and a power output coupled to the bootstrap capacitor.

20. The method of claim 18 , wherein the second sub-circuit periodically transfers charge between the bootstrap capacitor and the bootstrap capacitor coupled to the adjacent tier.

Assignments (2)

Continuity (3)

References Cited (85)