IP Library Granted Patent US 11,996,906
Granted Patent B1
US 11,996,906 · App. 18/309,966 · Granted May 28, 2024

Method and apparatus for establishing timing to perform link training in ethernet communication based on link quality and/or channel conditions

Inventors: Seid Alireza Razavi Majomard (Belmont, CA); Ehab Tahir (Mississauga, CA)
Assignee: Marvell Asia Pte Ltd
H04B3/46H04B3/20
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,996,906
App. No.
18/309,966
Granted
May 28, 2024
Kind
B1
Abstract

Systems and methods are described for dynamically updating a duration of link training time for a first stage of link training implemented to set up a first characteristic of a link connection between a physical layer transceiver (PHY) and a link partner. A first stage of link training preconfigured to last for a first duration of time is initiated and a metric of link quality that measures a link connection quality is initiated. Based on the determined metric of link quality, updating the first duration of time for the first stage of link training.

Claims (36)

1. A method for dynamically adjusting a duration of link training time for at least one stage of the link training between a physical layer transceiver (PHY) and a link partner, the method comprising:

initiating link training between the PHY and the link partner, wherein the link training is preconfigured to achieve a plurality of performance metric goals;

determining a degree of training performance based on the number of performance metrics achieved of the plurality of performance metric goals;

based on the degree of training performance, updating the duration of time for at least one stage of the link training.

2. The method of claim 1 wherein the link training is preconfigured with a threshold number of goals.

3. The method of claim 2 further comprising:

based on determining that the number of performance metrics achieved is below the threshold number of goals, determining that the degree of training performance is weak.

4. The method of claim 3 wherein, based on the degree of training performance being weak, updating the duration of time for at least one stage of the link training comprises increasing the duration of time.

5. The method of claim 2 further comprising:

based on determining that the number of performance metrics achieved is above the threshold number of goals, determining that the degree of training performance is strong.

6. The method of claim 5 wherein, based on the degree of training performance being strong, updating the duration of time for at least one stage of the link training comprises decreasing the duration of time.

7. The method of claim 1 , wherein the plurality of performance metric goals comprises at least one of a preset signal power output by an analog circuit, a timing recovery lock, and a preset signal to noise ratio.

8. The method of claim 1 , wherein the performance metric goals in the plurality of performance metric goals are determined by characteristics of additional circuitry used during the link training.

9. The method of claim 1 , further comprising:

determining an expected duration of time for a first stage of the link training, wherein a first goal is set to be achieved during the first stage of the link training.

10. The method of claim 9 , further comprising:

determining an actual duration of time for the first stage of the link training, wherein the actual duration comprises an amount of time for the first goal to be achieved; and

in response to determining that the actual duration is different from the expected duration, updating the duration of time for at least one stage of the link training comprises updating the duration of time for the first stage of link training.

11. A physical layer transceiver (PHY) configured for dynamic adjustment of a duration of link training time for at least one stage of the link training between the PHY and a link partner, the PHY comprising:

communication circuitry configured to initiate link training between the PHY and the link partner, wherein the link training is preconfigured to achieve a plurality of performance metric goals; and

control circuitry configured to:

determine a degree of training performance based on the number of performance metrics achieved of the plurality of performance metric goals, and

based on the degree of training performance, update the duration of time for at least one stage of the link training.

12. The PHY of claim 11 , wherein the control circuitry is further configured to determine a preconfigured threshold number of goals.

13. The PHY of claim 12 , wherein the control circuitry is further configured to, based on determining that the number of performance metrics achieved is below the threshold number of goals, determine that the degree of training performance is weak.

14. The PHY of claim 13 , wherein the control circuitry is further configured to, based on the degree of training performance being weak, when updating the duration of time for at least one stage of the link training, increase the duration of time.

15. The PHY of claim 13 , wherein the control circuitry is further configured to, based on the degree of training performance being strong, when updating the duration of time for at least one stage of the link training, decrease the duration of time.

16. The PHY of claim 12 , wherein the control circuitry is further configured to, based on determining that the number of performance metrics achieved is above the threshold number of goals, determine that the degree of training performance is strong.

17. The PHY of claim 11 , wherein the control circuitry is further configured to, when determining a degree of training performance based on the number of performance metrics achieved of the plurality of performance metric goals, determine at least one of a preset signal power output by an analog circuit, a timing recovery lock, and a preset signal to noise ratio.

18. The PHY of claim 11 , further comprising:

additional circuitry used during the link training; wherein

the communication circuitry is further configured to determine performance metric goals in the plurality of performance metric goals based on characteristics of the additional circuitry used during the link training.

19. The PHY of claim 11 , wherein the control circuitry is further configured to determine an expected duration of time for a first stage of the link training, wherein a first goal is set to be achieved during the first stage of the link training.

20. The PHY of claim 19 , wherein the control circuitry is further configured to:

determine an actual duration of time for the first stage of the link training, wherein the actual duration comprises an amount of time for the first goal to be achieved; and

in response to determining that the actual duration is different from the expected duration, update the duration of time for at least one stage of the link training comprises updating the duration of time for the first stage of link training.

Assignments (8)
MERGER Recorded Sep 5, 2025
From: INFINEON TECHNOLOGIES US NEWCO LLC
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 072563/0932 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2025
From: MARVELL ASIA PTE LTD
To: INFINEON TECHNOLOGIES US NEWCO LLC
Reel/Frame 072517/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: TAHIR, EHAB
To: MARVELL SEMICONDUCTOR CANADA INC.
Reel/Frame 063728/0450 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: MARVELL SEMICONDUCTOR CANADA INC.
To: MARVELL ASIA PTE LTD
Reel/Frame 063728/0465 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: MAJOMARD, SAID ALIREZA RAZAVI
To: MARVELL SEMICONDUCTOR, INC.
Reel/Frame 063728/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: MARVELL SEMICONDUCTOR, INC.
To: MARVELL ASIA PTE LTD
Reel/Frame 063728/0523 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: MAJOMARD, SEID ALIREZA RAZAVI
To: MARVELL SEMICONDUCTOR, INC.
Reel/Frame 063728/0496 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2023
From: MARVELL SEMICONDUCTOR, INC.
To: MARVELL ASIA PTE LTD
Reel/Frame 063728/0430 →
Continuity (2)
Continuation 17664452 · May 23, 2022
Provisional Application 63192443 · May 24, 2021