Electro-static discharge protection device

1 . An electro-static discharge (ESD) protection device comprising:

a first diode pair coupled between an input/output pad and a supply voltage terminal to form a first discharge path; and

a second diode pair coupled between the input/output pad and a ground terminal to form a second discharge path,

wherein the first diode pair includes a first P-type diode and a second P-type diode coupled in parallel,

wherein the second diode pair includes a first N-type diode and a second N-type diode coupled in parallel, and

wherein the first diode pair includes:

an N-type well region;

a first P + -type region disposed in an upper central region of the N-type well region;

a first N + -type region disposed to surround the first P + -type region; and

a second P + -type region disposed to surround the first N + -type region.

2 . The ESD protection device of claim 1 ,

wherein an anode of the first P-type diode and an anode of the second P-type diode are coupled to the input/output pad, and

wherein a cathode of the first P-type diode and a cathode of the second P-type diode are coupled to the supply voltage terminal.

3 . The ESD protection device of claim 1 ,

wherein an anode of the first N-type diode and an anode of the second N-type diode are coupled to the ground terminal, and

wherein a cathode of the first N-type diode and a cathode of the second N-type diode are coupled to the input/output pad.

4 . The ESD protection device of claim 1 ,

wherein the N-type well region is disposed in an upper region of a P-type substrate, and

wherein the N-type well region and the P-type substrate are coupled to the supply voltage terminal and the ground terminal, respectively.

5 . The ESD protection device of claim 4 ,

wherein the first P + -type region and the second P + -type region are coupled to the input/output pad, and

wherein the first N + -type region is coupled to the supply voltage terminal.

6 . The ESD protection device of claim 1 ,

wherein the first P + -type region constitutes an anode of the first P-type diode,

wherein the second P + -type region constitutes an anode of the second P-type diode, and

wherein the N-type well region and the first N + -type region constitute a cathode of the first P-type diode and a cathode of the second P-type diode.

7 . The ESD protection device of claim 1 , further comprising:

a first device isolation layer disposed between the first P + -type region and the first N + -type region to surround the first P + -type region; and

a second device isolation layer disposed between the first N + -type region and the second P + -type region to surround the first N + -type region.

8 . The ESD protection device of claim 1 , wherein the second diode pair includes:

a first P-type well region;

a second N + -type region disposed in an upper central region of the first P-type well region;

a third P + -type region disposed to surround the second N + -type region; and

a third N + -type region disposed to surround the third P + -type region.

9 . The ESD protection device of claim 8 ,

wherein the first P-type well region is disposed in a P-type substrate, and

wherein the first P-type well region and the P-type substrate are coupled to the ground terminal.

10 . The ESD protection device of claim 9 ,

wherein the second N + -type region and the third N + -type region are coupled to the input/output pad, and

wherein the third P + -type region is coupled to the ground terminal.

11 . The ESD protection device of claim 8 ,

wherein the second N + -type region constitutes an anode of the first N-type diode,

wherein the third N + -type region constitutes an anode of the second N-type diode, and

wherein the first P-type well region and the third P + -type region constitute a cathode of the first N-type diode and a cathode of the second N-type diode.

12 . The ESD protection device of claim 8 , further comprising:

a third device isolation layer disposed between the second N + -type region and the third P + -type region to surround the second N + -type region; and

a fourth device isolation layer disposed between the third P + -type region and the third N + -type region to surround the third P + -type region.

13 . An electro-static discharge (ESD) protection device comprising:

a first diode pair coupled between an input/output pad and a supply voltage terminal to form a first discharge path;

a second diode pair coupled between the input/output pad and a ground terminal to from a second discharge path; and

a third diode pair coupled between the supply voltage terminal and the ground terminal to form a third discharge path,

wherein the first diode pair includes a first P-type diode and a second P-type diode coupled in parallel,

wherein the second diode pair includes a first N-type diode and a second N-type diode coupled in parallel, and

wherein the first diode pair includes:

a first N-type well region;

a first P + -type region disposed in an upper central region of the first N-type well region;

a first N + -type region disposed to surround the first P + -type region; and

a second P + -type region disposed to surround the first N + -type region.

14 . The ESD protection device of claim 13 , wherein the third diode pair includes a third N-type diode and a fourth N-type diode coupled in parallel.

15 . The ESD protection device of claim 14 ,

wherein an anode of the third N-type diode and an anode of the fourth N-type diode are coupled to the ground terminal, and

wherein a cathode of the third N-type diode and a cathode of the fourth N-type diode are coupled to the supply voltage terminal.

16 . The ESD protection device of claim 14 ,

wherein the second diode pair includes:

a first P-type well region;

a second N + -type region disposed in an upper central region of the first P-type well region;

a third P + -type region disposed to surround the second N + -type region; and

a third N + -type region disposed to surround the third P + -type region.

17 . The ESD protection device of claim 16 , wherein the third diode pair includes:

a second P-type well region;

a fourth N + -type region disposed in an upper central region of the second P-type well region;

a fourth P + -type region disposed to surround the fourth N + -type region; and

a fifth N + -type region disposed to surround the fourth P + -type region.

18 . The ESD protection device of claim 17 ,

wherein the second P-type well region is disposed in an upper region of a P-type substrate, and

wherein the second P-type well region and the P-type substrate are coupled to the ground terminal.

19 . The ESD protection device of claim 17 ,

wherein the fourth N + -type region and the fifth N + -type region are coupled to the supply voltage terminal, and

wherein the fourth P + -type region is coupled to the ground terminal.

20 . The ESD protection device of claim 17 ,

wherein the fourth N + -type region constitutes a cathode of the third N-type diode,

wherein the fifth N + -type region constitutes a cathode of the fourth N-type diode, and

wherein the second P-type well region and the fourth P + -type region constitute an anode of the third N-type diode and an anode of the fourth N-type diode.

21 . The ESD protection device of claim 17 , further comprising:

a first device isolation layer disposed between the first P + -type region and the first N + -type region to surround the first P + -type region;

a second device isolation layer disposed between the first N + -type region and the second P + -type region to surround the first N + -type region;

a third device isolation layer disposed between the second N + -type region and the third P + -type region to surround the second N + -type region; and

a fourth device isolation layer disposed between the third P + -type region and the third N + -type region to surround the third P + -type region.

22 . The ESD protection device of claim 21 , further comprising:

a fifth device isolation layer disposed between the fourth N + -type region and the fourth P + -type region to surround the fourth N + -type region; and

a sixth device isolation layer disposed between the fourth P + -type region and the fifth N + -type region to surround the fourth P + -type region.