Adaptive low-pass filter for zero-crossing detection
A circuit detects zero crosses in an input-signal and includes a low-pass-filter (LPF) receiving the input-signal and introducing a phase-shift dependent on the frequency thereof. Filter circuitry receives the output of the LPF, applies a fixed phase-shift thereto, and adjusts phase and DC-offset thereof based on control signals to produce a filtered output-signal. Control circuitry has a zero-crossing detector receiving the input-signal and the filtered output-signal, detecting zero-crossings of the input-signal and the filtered output-signal, asserting a digital zero cross signal at each zero crossing, and determining a phase-shift and DC-offset between the input-signal and filtered output-signal. The control circuitry has a controller generating the control signals, based upon the phase-shift and DC-offset, so a total phase-shift between the input-signal and the filtered output-signal is constant and there is a same duty-cycle between the input-signal and the filtered output-signal, providing for accurate zero-crossing detection.
1. A circuit configured for detection of a zero crossing in a power signal, comprising:
a low-pass filter (LPF) configured to receive an input signal indicative of the power signal and to introduce a phase shift dependent on a frequency of the input signal;
filter circuitry configured to: receive an output of the LPF and to apply a fixed phase shift thereto, and adjust phase and DC offset correction of the output of the LPF based on control signals to produce a filtered output signal; and
control circuitry comprising:
a zero crossing detector configured to receive the input signal and the filtered output signal, detect zero crossings of the input signal and the filtered output signal, assert a digital zero cross signal at each zero crossing, and determine a phase shift and DC offset correction between the input signal and filtered output signal; and
a controller configured to generate the control signals, based upon the phase shift and DC offset correction, such that a total phase shift between the input signal and the filtered output signal is constant and there is a same duty cycle between the input signal and the filtered output signal, thereby providing for accurate zero crossing detection by the zero crossing detector.
2. The circuit of claim 1 , wherein the control circuitry further comprises a slope detector configured, at each zero crossing of the input signal and the filtered output signal, to determine a difference between slopes of the input signal and the filtered output signal and provide feedback to the controller to cause the controller to adjust phase and DC offset correction applied by the filter circuitry to the input signal based on the determined difference.
3. The circuit of claim 2 , wherein the controller is configured to transition between multiple states to adjust the phase and DC offset correction applied by the filter circuitry, the multiple states including at least: a locked state in which no adjustments are made to the phase correction; a phase fine state in which fine adjustments are made to the phase correction; a phase gross state in which gross adjustments are made to the phase correction; an offset fine state in which fine adjustments are made to the DC offset correction; and an offset gross state in which gross adjustments are made to the DC offset correction.
4. The circuit of claim 3 , wherein in the phase fine state and the phase gross state, the controller is configured to utilize gross and fine lookup tables to determine adjustments for the phase correction applied by the filter circuitry to the input signal.
5. The circuit of claim 4 , wherein the gross lookup table contains coefficients that increment the phase correction applied by the filter circuitry by different given gross degree values, and the fine lookup table contains coefficients that increment the phase correction applied by the filter circuitry for given different fine degree values.
6. The circuit of claim 5 , wherein the gross and fine lookup tables contain coefficients derived from historical zero crossing data of the input signal and output filtered signal.
7. The circuit of claim 2 , wherein the control circuitry is configured to generate phase and offset adjustment control signals, and wherein the filter circuitry is configured to use these phase and offset adjustment control signals to adjust both the phase and the offset correction applied by the filter circuitry to the input signal.
8. The circuit of claim 1 , wherein the total phase shift between the input signal and the filtered output signal is 180°.
9. The circuit of claim 1 , wherein the filter circuitry comprises:
a fixed all-pass (FAP) filter configured to receive the output of the LPF and to apply the fixed phase shift thereto; and
an adaptive all-pass (AAP) filter configured to receive the output of the FAP filter and adjust its phase and DC offset correction based on the control signals to produce the filtered output signal.
10. A method for detecting a zero crossing in a power signal, comprising:
receiving an input signal indicative of the power signal at a low-pass filter (LPF) which introduces a phase shift dependent on a frequency of the input signal;
passing an output of the LPF through filter circuitry which applies a fixed phase shift thereto and which adjusts phase of the output of the LPF based upon received control signals to produce a filtered output signal;
detecting zero crossings of the input signal and the filtered output signal and asserting a digital zero cross signal at each zero crossing, and determining a phase shift and DC offset correction between the input signal and filtered output signal; and
generating the control signals based upon the determined phase shift and DC offset correction such that a total phase shift between the input signal and the filtered output signal remains constant and there is a same duty cycle between the input signal and the filtered output signal to thereby provide for accurate detection of the zero crossings of the input signal.
11. The method of claim 10 , further comprising: at each detected zero crossing of the input signal and the filtered output signal, determining a difference between slopes of the input signal and the filtered output signal; and providing feedback based on the determined difference to adjust phase and DC offset correction applied to the input signal.
12. The method of claim 10 , further comprising: transitioning between multiple states to adjust the phase and DC offset correction applied to the input signal, the states including at least: a locked state, in which no adjustments are made to the phase correction; a phase fine state in which fine adjustments are made to the phase correction; a phase gross state in which gross adjustments are made to the phase correction; an offset fine state in which fine adjustments are made to the DC offset correction; and an offset gross state in which gross adjustments are made to the DC offset correction.
13. The method of claim 12 , wherein during the phase fine state and the phase gross state, gross and fine lookup tables are utilized to determine adjustments for the phase correction applied to the input signal.
14. The method of claim 10 , wherein passing the output of the LPF through filter circuitry which applies a fixed phase shift thereto and which adjusts phase and DC offset correction of the output of the LPF based upon received control signals to produce a filtered output signal comprises:
passing the output of the LPF through a fixed all-pass (FAP) filter which applies a fixed phase shift thereto; and
passing the output of the FAP filter through an adaptive all-pass (AAP) filter which adjusts phase and DC offset correction of the output of the FAP filter based on received control signals to produce a filtered output signal.
15. A circuit configured for detection of a zero crossing in a power signal, comprising:
a low-pass filter (LPF) configured to receive an input signal indicative of the power signal and to introduce a phase shift dependent on the frequency of the input signal;
filter circuitry configured to: receive output of the LPF and to apply a fixed phase shift thereto, and adjust phase of the output of the LPF based on control signals to produce a filtered output signal; and
control circuitry comprising:
a zero crossing detector configured to receive the input signal and the filtered output signal, detect zero crossings of the input signal and the filtered output signal, assert a digital zero cross signal at each zero crossing, and determine a phase shift between the input signal and filtered output signal; and
a controller configured to generate the control signals, based upon the phase shift, such that a total phase shift between the input signal and the filtered output signal is constant and there is a same duty cycle between the input signal and the filtered output signal, thereby providing for accurate zero crossing detection by the zero crossing detector.
16. The circuit of claim 15 , wherein the control circuitry further comprises a slope detector configured, at each zero crossing of the input signal and the filtered output signal, to determine a difference between slopes of the input signal and the filtered output signal and provide feedback to the controller to cause the controller to adjust a phase correction applied by the filter circuitry to the input signal based on the determined difference.
17. The circuit of claim 16 , wherein the controller is configured to transition between multiple states to adjust the phase correction applied by the filter circuitry, the multiple states including at least: a locked state in which no adjustments are made to the phase correction; a phase fine state in which fine adjustments are made to the phase correction; and a phase gross state in which gross adjustments are made to the phase correction.
18. The circuit of claim 17 , wherein in the phase fine state and the phase gross state, the controller is configured to utilize gross and fine lookup tables to determine adjustments for the phase correction applied by the filter circuitry to the input signal.
19. The circuit of claim 18 , wherein the gross lookup table contains coefficients that increment the phase correction applied by the filter circuitry by different given gross degree values, and the fine lookup table contains coefficients that increment the phase correction applied by the filter circuitry for given different fine degree values.
20. The circuit of claim 19 , wherein the gross and fine lookup tables contain coefficients derived from historical zero crossing data of the input signal and output filtered signal.
21. The circuit of claim 16 , wherein the control circuitry is configured to generate phase adjustment control signals, and wherein the filter circuitry is configured to use these phase adjustment control signals to adjust the phase correction applied by the filter circuitry to the input signal.
22. The circuit of claim 15 , wherein the total phase shift between the input signal and the filtered output signal is 180°.
23. The circuit of claim 15 , wherein the filter circuitry comprises:
a fixed all-pass (FAP) filter configured to receive the output of the LPF and to apply the fixed phase shift thereto; and
an adaptive all-pass (AAP) filter configured to receive the output of the FAP filter and adjust its phase based on the control signals to produce the filtered output signal.