IP Library Granted Patent US 12,602,327
Granted Patent B2
US 12,602,327 · App. 18/384,701 · Granted Apr 14, 2026

Counter-based prefetch management for memory

Inventors: Robert Nasry Hasbun (San Jose, CA); Dean D. Gans (Nampa, ID); Sharookh Daruwalla (San Ramon, CA)
G06F12/0862G06F13/20G06F2212/1028G06F2212/6022G06F2212/652
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Quick Facts
Patent No.
US 12,602,327
App. No.
18/384,701
Granted
Apr 14, 2026
Kind
B2
Abstract

Methods, systems, and devices are described for wireless communications. A request for data located in a memory page of a memory array may be received at a device, and a value of a prefetch counter associated with the memory page may be identified. A portion of the memory page that includes the requested data may then be communicated between a memory array and memory bank of the device based on the value of the prefetch counter. For instance, the portion of the memory page may be selected based on the value of the prefetch counter. A second portion of the memory page may be communicated to a buffer of the device, and the value of the prefetch counter may be modified based on a relationship between the first portion of the memory page and the second portion of the memory page.

Claims (48)

1 . A memory device, comprising:

a memory; and

a counter configured to monitor respective quantities of access commands for data stored to the memory, wherein the memory device is configured to:

receive a first access command associated with a first portion of the memory;

update a value associated with the counter based at least in part on performing a first access operation associated with the first access command; and

perform a second access operation on the first portion of the memory based at least in part on the value associated with the counter satisfying a threshold value.

2 . The memory device of claim 1 , wherein to update the value associated with the counter, the memory device is further configured to:

increment the value associated with the counter based at least in part on performing the first access operation.

3 . The memory device of claim 1 , wherein to determine that the value associated with the counter satisfies the threshold value, the memory device is further configured to:

determine that the value associated with the counter is greater than the threshold value.

4 . The memory device of claim 1 , wherein the memory device is further configured to:

reset the value associated with the counter based at least in part on performing the second access operation.

5 . The memory device of claim 1 , wherein the first portion of the memory is a subset or a subpage of a memory page.

6 . The memory device of claim 1 , wherein the counter is configured to:

store a plurality of values corresponding to a plurality of subpages of the memory; and

increment a value of the plurality of values based at least in part on receiving a request to access a corresponding subpage of the plurality of subpages.

7 . The memory device of claim 6 , further comprising a buffer, wherein the memory device is configured to:

evict first data from the buffer based at least in part on a first duration for which the first data has been stored in the buffer, a second duration for which the first data has been stored in the buffer without being accessed, or both, wherein the counter is configured to reset the plurality of values based at least in part on the first data being evicted from the buffer.

8 . A method, comprising:

receiving a first access command associated with a first portion of a memory;

updating a value associated with a counter based at least in part on performing a first access operation associated with the first access command; and

performing a second access operation on the first portion of the memory based at least in part on the value associated with the counter satisfying a threshold value.

9 . The method of claim 8 , wherein updating a value associated with the counter comprises:

incrementing the value associated with the counter based at least in part on performing the first access operation.

10 . The method of claim 8 , wherein determining that the value associated with the counter satisfies the threshold value comprises:

determining that the value associated with the counter is greater than the threshold value.

11 . The method of claim 8 , further comprising:

resetting the value associated with the counter based at least in part on performing the second access operation.

12 . The method of claim 8 , wherein the first portion of the memory is a subset or a subpage of a memory page.

13 . The method of claim 8 , further comprising:

storing a plurality of values corresponding to a plurality of subpages of the memory; and

incrementing a value of the plurality of values based at least in part on receiving a request to access a corresponding subpage of the plurality of subpages.

14 . The method of claim 13 , further comprising:

evicting first data from a buffer based at least in part on a first duration for which the first data has been stored in the buffer, a second duration for which the first data has been stored in the buffer without being accessed, or both, wherein the counter is configured to reset the plurality of values based at least in part on the first data being evicted from the buffer.

15 . A non-transitory computer-readable medium storing code, the code comprising instructions executable by one or more processors to:

receive a first access command associated with a first portion of a memory;

update a value associated with a counter based at least in part on performing a first access operation associated with the first access command; and

perform a second access operation on the first portion of the memory based at least in part on the value associated with the counter satisfying a threshold value.

16 . The non-transitory computer-readable medium of claim 15 , wherein to update the value associated with the counter, the instructions are further executable by the one or more processors to:

increment the value associated with the counter based at least in part on performing the first access operation.

17 . The non-transitory computer-readable medium of claim 15 , wherein to determine that the value associated with the counter satisfies the threshold value, the instructions are further executable by the one or more processors to:

determine that the value associated with the counter is greater than the threshold value.

18 . The non-transitory computer-readable medium of claim 15 , wherein the instructions are further executable by the one or more processors to:

reset the value associated with the counter based at least in part on performing the second access operation.

19 . The non-transitory computer-readable medium of claim 15 , wherein the first portion of the memory is a subset or a subpage of a memory page.

20 . The non-transitory computer-readable medium of claim 15 , wherein the instructions are further executable by the one or more processors to:

store a plurality of values corresponding to a plurality of subpages of the memory; and

increment a value of the plurality of values based at least in part on receiving a request to access a corresponding subpage of the plurality of subpages.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2025
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 072738/0046 →