IP Library Granted Patent US 12,426,411
Granted Patent B2
US 12,426,411 · App. 18/396,320 · Granted Sep 23, 2025

Semiconductor device, semiconductor component and display panel including the same

Inventors: Min-Hsun Hsieh (Hsinchu, TW); Yu-Tsu Lee (Hsinchu, TW); Wei-Jen Hsueh (Hsinchu, TW)
Assignee: Epistar Corporation
H10H20/824H10H20/013H10H20/857H10H29/142
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Quick Facts
Patent No.
US 12,426,411
App. No.
18/396,320
Granted
Sep 23, 2025
Kind
B2
Abstract

The present disclosure provides a semiconductor device including a semiconductor structure, a first metal element-containing structure, and a layer. The semiconductor structure includes a first semiconductor layer having a first material, a second semiconductor layer, an active region between the first semiconductor layer and the second semiconductor layer. The first metal element-containing structure is located on the semiconductor structure and includes a first metal element. The layer has a second material and a second metal element and is located between the first semiconductor layer and the first metal element-containing structure. The first material has a conduction band edge Ec and a valence band edge Ev, and the second material has a work function WF 1 , when the first semiconductor layer is of an n-type conductivity, the work function WF 1 fulfills WF 1 <(Ec+Ev)/2, and when the first semiconductor layer is of a p-type conductivity, the work function WF 1 fulfills WF 1 >(Ec+Ev)/2.

Claims (36)

1. A semiconductor device, comprising:

a semiconductor structure including a first semiconductor layer having a first material, a second semiconductor layer, an active region between the first semiconductor layer and the second semiconductor layer;

a first metal element-containing structure located on the semiconductor structure and comprising a first metal element; and

a layer having a second material and a second metal element, located between the first semiconductor layer and the first metal element-containing structure;

wherein the first material has a conduction band edge Ec and a valence band edge Ev, and the second material has a work function WF 1 , when the first semiconductor layer is of an n-type conductivity, the work function WF 1 fulfills WF 1 <(Ec+Ev)/2, and when the first semiconductor layer is of a p-type conductivity, the work function WF 1 fulfills WF 1 >(Ec+Ev)/2.

2. The semiconductor device of claim 1 , wherein the layer physically contacts the first metal element-containing structure and the first semiconductor layer.

3. The semiconductor device of claim 1 , wherein the first metal element has a second work function WF 2 , the layer is of an n-type conductivity and the second work function WF 2 is greater than the first work function WF 1 .

4. The semiconductor device of claim 1 , wherein the first metal element has a second work function WF 2 , the layer is of a p-type conductivity, and the first work function WF 1 is greater than the second work function WF 2 .

5. The semiconductor device of claim 1 , further comprising a third semiconductor layer between the active region and the first semiconductor layer, wherein the second semiconductor layer, the active region and the third semiconductor layer forms a first mesa structure, and the first semiconductor layer forms a second mesa structure.

6. The semiconductor device of claim 5 , wherein the first mesa structure has a first width W 1 and the second mesa structure has a second width W 2 larger than the first width W 1 .

7. The semiconductor device of claim 5 , further comprising an insulating structure located on the semiconductor structure and having a first opening, and a first electrode pad which covers a portion of the insulating structure and fills the first opening.

8. The semiconductor device of claim 5 , wherein the first electrode pad covers a portion of the first mesa structure.

9. The semiconductor device of claim 5 , wherein the first mesa structure has a first side surface, a second side surface and a first top surface, the layer covers and physically contacts the first side surface, the second side surface and the first top surface.

10. The semiconductor device of claim 1 , further comprising a second metal element-containing structure located between the insulating structure and the semiconductor structure and comprising a second metal element.

11. The semiconductor device of claim 10 , wherein the layer physically contacts the second metal element-containing structure, and is not overlapped with the second metal element-containing structure in a vertical direction.

12. The semiconductor device of claim 11 , wherein the second metal element-containing structure has a third side surface, a fourth side surface and a second top surface, and the layer covers a portion of the second top surface, a third side surface, and a fourth side surface.

13. The semiconductor device of claim 1 , further comprising an insulating structure located on the semiconductor structure, wherein the semiconductor structure has a total thickness t 0 , and the insulating structure has a thickness t 1 less than 15% of the total thickness t 0 .

14. The semiconductor device comprising:

a first semiconductor layer having a first portion and a second portion;

a first mesa disposed on the first portion without being on the second portion, the first mesa having a side surface and a top surface;

a layer covering the first portion of the first semiconductor layer, the side surface and the top surface of the first mesa, and electrically connected to the first semiconductor layer;

a first metal element-containing layer disposed on the second portion and directly contacting the layer; and

a first electrode pad disposed on the second portion and directly contacting the first metal element-containing layer.

15. The semiconductor device of claim 14 , wherein the first metal element-containing layer has a first area and the first electrode pad has a second area in a top view, and the first area is smaller than the second area.

16. The semiconductor device of claim 15 , wherein the layer has a third area in the top view, and the first area is smaller than the third area.

17. The semiconductor device of claim 14 , further comprising an insulating structure located on the layer and having a first opening.

18. The semiconductor device of claim 14 , further comprising a second metal element-containing layer disposed on the first mesa and the layer covers a portion of the second metal element-containing layer.

19. A semiconductor component, comprising:

a bonding substrate;

a plurality of semiconductor devices located on the bonding substrate; and

an adhesive structure between the bonding substrate and the plurality of semiconductor devices;

wherein one of the plurality of semiconductor devices is the semiconductor device of claim 1 , the bonding substrate includes a first area covered by the adhesive structure and a second area not covered by the adhesive structure.

20. A display panel, comprising:

a carrier substrate; and

a plurality of pixel units on the carrier substrate;

wherein one of the plurality of pixel units comprises the semiconductor device of claim 1 .

Assignments (2)
CHANGE OF NAME Recorded Feb 26, 2026
From: EPISTAR CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075152/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2023
From: HSIEH, MIN-HSUN; LEE, YU-TSU; HSUEH, WEI-JEN
To: EPISTAR CORPORATION
Reel/Frame 065973/0933 →
Continuity (2)
Continuation 17203293 · Mar 16, 2021
Related Publication 20240186449A1 · Jun 6, 2024
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