IP Library Granted Patent US 12,547,548
Granted Patent B1
US 12,547,548 · App. 18/403,483 · Granted Feb 10, 2026

Storage drive

Inventors: Robert Lercari (Thousand Oaks, CA); Alan Chen (Simi Valley, CA); Mike Jadon (Manhattan Beach, CA); Craig Robertson (Simi Valley, CA); Andrey V. Kuzmin (Moscow, RU)
Assignee: Radian Memory Systems, LLC
G06F12/1009G06F3/0616G06F3/064G06F3/0688G06F12/0207G06F12/0246G06F12/109G06F3/0659G06F3/0662G06F2212/1016G06F2212/7201G06F2212/7202G06F2212/7205
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Quick Facts
Patent No.
US 12,547,548
App. No.
18/403,483
Granted
Feb 10, 2026
Kind
B1
Abstract

This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.

Claims (122)

1 . A storage drive comprising:

flash memory having physical erase units;

wherein the storage drive is operable to receive incoming data write requests and corresponding address information and supports a logical memory space having block devices, and for each of the block devices, one or more logical subdivisions;

wherein each of the logical subdivisions corresponds to a group of N logical units, where N is one or more, and wherein the logical subdivisions are mapped, on a mutually-exclusive basis, to respective subsets of one or more of the physical erase units;

circuitry operable to, for each of the incoming data write requests:

derive a first address portion and a second address portion;

identify a selected one of the block devices according to the first address portion;

identify a selected logical subdivision of the selected one of the block devices according to the second address portion;

identify an offset, and perform a division operation to identify from the offset:

one of the N logical units from the group corresponding to the selected logical subdivision,

one of the physical erase units in the subset which is respective to the selected logical subdivision, and

a physical page in the identified one of the physical erase units; and

service the incoming data write request by accessing the identified one of the physical erase units and storing accompanying write data in the identified physical page;

wherein the circuitry is further operable to derive a third address portion from the corresponding address information, wherein the offset is selected dependent on the third address portion.

2 . The storage drive of claim 1 , wherein the circuitry is further operable to detect a failure condition of the identified one of the physical erase units and, in response to detection of the failure condition, to map the selected logical subdivision to a second one of the physical erase units, the second one of the physical erase units being distinct from the respective subsets of the physical erase units, such that the group respective to the specific logical subdivision is thereafter mapped to a new subset of one or more of the physical erase units, the new subset including the second one of the physical erase units, and such that the second one of the physical erase units is uniquely mapped to the selected logical subdivision, to the exclusion of every other logical subdivision.

3 . The storage drive of claim 1 , wherein:

the storage drive comprises at least one register to store a programmable setting; and

for at least one of the block devices, N is variable dependent on the programmable setting.

4 . The storage drive of claim 1 , wherein:

the storage drive further comprises at least one register to store a programmable setting; and

for a first one of the block devices, N is selectively different than for a second one of the block devices, in dependence on a value of the programmable setting.

5 . The storage drive of claim 1 , wherein the circuitry is further operable to:

store metadata for each of the logical subdivisions, unsolicitedly update the metadata as an automated response to operation of the storage drive, and transmit, to a host, dependent on satisfaction by the unsolicitedly updated metadata of at least one criterion, an address corresponding to a specific one of the logical subdivisions; and

receive and execute one or more maintenance commands, issued by the host, which specify the address.

6 . The storage drive of claim 5 , wherein the stored metadata indicates physical erase unit utilization information respectively associated with each of one or more respectively-identified ones of the logical subdivisions.

7 . The storage drive of claim 5 , wherein the circuitry is further operable to, responsive to the one or more maintenance commands, copy data to a different physical erase unit.

8 . The storage device drive of claim 5 , wherein the metadata indicates a time since data was written into at least one of the physical erase units in the subset which is respective to a specific one of the logical subdivisions.

9 . The storage drive of claim 1 , wherein:

the storage drive further comprises at least one register to store a size, for at least one of the logical subdivisions, indicating an amount of storage space that is to be physically erased; and

the circuitry is further operable to:

transmit, to a host, information which conveys the size; and

wherein the one or more maintenance commands cause the circuitry to control targeted physical erasure of a specific portion of the flash memory corresponding to the amount of the storage space that is to be physically erased.

10 . The storage drive of claim 1 , wherein:

the flash memory comprises planes of flash memory; and

the subset of the physical erase units respective to at least one of the logical subdivisions is configurable so as to comprise physical erase units which are on different ones of the planes of flash memory.

11 . The storage drive of claim 1 , wherein, for at least one of the logical subdivisions, N is exactly one.

12 . The storage drive of claim 1 , wherein, for at least one of the logical subdivisions, N is configurable to be exactly one.

13 . The storage drive of claim 1 , wherein the circuitry is further operable to perform garbage collection on a basis that is dedicated to a specific one of the logical subdivisions, wherein valid data associated with the specific one of the logical subdivisions is copied to erase units that have only data associated with the specific one of the logical subdivisions.

14 . The storage drive of claim 1 , wherein a size of at least one of the logical subdivisions can be a non-power of two number of storage locations.

15 . A storage drive comprising:

flash memory having physical erase units;

wherein the storage drive is operable to receive incoming data write requests and corresponding address information and supports a logical memory space having block devices, and for each of the block devices, one or more logical subdivisions;

wherein each of the logical subdivisions corresponds to a group of N logical units, where N is one or more, and wherein the logical subdivisions are mapped, on a mutually-exclusive basis, to respective subsets of one or more of the physical erase units;

circuitry operable to, for each of the incoming data write requests:

derive a first address portion and a second address portion;

identify a selected one of the block devices according to the first address portion;

identify a selected logical subdivision of the selected one of the block devices according to the second address portion;

identify an offset, and perform a division operation to identify from the offset:

one of the N logical units from the group corresponding to the selected logical subdivision,

one of the physical erase units in the subset which is respective to the selected logical subdivision, and

a physical page in the identified one of the physical erase units; and

service the incoming data write request by accessing the identified one of the physical erase units and storing accompanying write data in the identified physical page;

wherein the circuitry is further operable to:

store metadata for each of the logical subdivisions, unsolicitedly update the metadata as an automated response to operation of the storage drive, and transmit, to a host, information which is dependent on the unsolicitedly updated metadata; and

receive and execute a command issued by the host, wherein the circuitry resets corresponding metadata as a function of executing the command.

16 . The storage drive of claim 1 , wherein:

the storage drive is operable to receive incoming data read requests which specify corresponding read address information; and

the circuitry is operable to, for each of the incoming data read requests:

derive, from the corresponding read address information, a first read address portion and a second read address portion;

identify a specific one of the block devices from the first read address portion;

identify a particular physical erase unit and a particular physical page in the particular physical erase unit from the second read address portion; and

service the corresponding incoming data read request by retrieving data from the particular physical page in the particular physical erase unit and transmitting the retrieved data to a host.

17 . The storage drive of claim 1 , wherein the circuitry is further operable to:

store metadata for each of the logical subdivisions, unsolicitedly update the metadata as an automated response to operation of the storage drive, and transmit, to a host, information which is dependent on the unsolicitedly updated metadata; and

receive and execute a command issued by the host, wherein the circuitry resets corresponding metadata as a function of executing the command.

18 . The storage drive of claim 1 , wherein the circuitry is further operable to, in response to at least one command dynamically received from a host, map the selected logical subdivision to a second one of the physical erase units, the second one of the physical erase units being distinct from the respective subsets of the physical erase units, such that the group respective to the specific logical subdivision is thereafter mapped to a new subset of one or more of the physical erase units, the new subset including the second one of the physical erase units, and such that the second one of the physical erase units is uniquely mapped to the selected logical subdivision, to the exclusion of every other logical subdivision.

19 . The storage drive of claim 1 , wherein the circuitry is further operable to:

store metadata for each of the logical subdivisions, unsolicitedly update the metadata as an automated response to operation of the storage drive, and transmit, to a host, information which is dependent on the unsolicitedly updated metadata, wherein the information transmitted to the host indicates physical erase unit utilization information respectively associated with each of one or more respectively-identified ones of the logical subdivisions;

receive and execute one or more maintenance commands, issued by the host and, in association with execution of the one or more maintenance commands and a condition where a portion of the flash memory associated with a specific one of the logical subdivision no longer contains any valid data, control physical erasure of at least one erase unit corresponding to the specific one of the logical subdivisions.

20 . A storage device comprising:

flash memory having physical erase units;

wherein the storage drive is operable to receive incoming data write requests and corresponding address information and supports a logical memory space having block devices, and for each of the block devices, one or more logical subdivisions;

wherein each of the logical subdivisions corresponds to a group of N logical units, where N is one or more, and wherein the logical subdivisions are mapped, on a mutually-exclusive basis, to respective subsets of one or more of the physical erase units;

circuitry operable to, for each of the incoming data write requests:

derive a first address portion and a second address portion;

identify a selected one of the block devices according to the first address portion;

identify a selected logical subdivision of the selected one of the block devices according to the second address portion;

identify an offset, and perform a division operation to identify from the offset:

one of the N logical units from the group corresponding to the selected logical subdivision,

one of the physical erase units in the subset which is respective to the selected logical subdivision, and

a physical page in the identified one of the physical erase units; and

service the incoming data write request by accessing the identified one of the physical erase units and storing accompanying write data in the identified physical page;

wherein the circuitry is further operable to:

store metadata for each of the logical subdivisions, unsolicitedly update the metadata as an automated response to operation of the storage drive, and transmit, to a host, information which is dependent on the unsolicitedly updated metadata; and

receive and execute a command issued by the host, wherein the circuitry resets corresponding metadata as a function of executing the command.

21 . A storage device comprising:

flash memory having physical erase units;

wherein the storage drive is operable to receive incoming data write requests and corresponding address information and supports a logical memory space having block devices, and for each of the block devices, one or more logical subdivisions;

wherein each of the logical subdivisions corresponds to a group of N logical units, where N is one or more, and wherein the logical subdivisions are mapped, on a mutually-exclusive basis, to respective subsets of one or more of the physical erase units;

circuitry operable to, for each of the incoming data write requests:

derive a first address portion and a second address portion;

identify a selected one of the block devices according to the first address portion;

identify a selected logical subdivision of the selected one of the block devices according to the second address portion;

identify an offset, and perform a division operation to identify from the offset:

one of the N logical units from the group corresponding to the selected logical subdivision,

one of the physical erase units in the subset which is respective to the selected logical subdivision, and

a physical page in the identified one of the physical erase units; and

service the incoming data write request by accessing the identified one of the physical erase units and storing accompanying write data in the identified physical page;

wherein the storage drive further comprises at least one register to store a size, for at least one of the logical subdivisions, indicating an amount of storage space that is to be physically erased; and

wherein the circuitry is further operable to:

transmit, to a host, information which conveys the size; and

receive and execute at least one command issued by the host, wherein the at least one command causes the circuitry to control targeted physical erasure of a specific portion of the flash memory corresponding to the amount of storage space that is to be physically erased.

22 . The storage drive of claim 15 , wherein the circuitry is further operable to derive a third address portion from the corresponding address information, wherein the offset is selected dependent on the third address portion.

23 . A storage drive comprising:

flash memory having physical erase units;

wherein the storage drive is operable to receive incoming data write requests and corresponding address information and supports a logical memory space having block devices, and for each of the block devices, one or more logical subdivisions;

wherein each of the logical subdivisions corresponds to a group of N logical units, where N is one or more, and wherein the logical subdivisions are mapped, on a mutually-exclusive basis, to respective subsets of one or more of the physical erase units;

circuitry operable to, for each of the incoming data write requests:

derive a first address portion and a second address portion;

identify a selected one of the block devices according to the first address portion;

identify a selected logical subdivision of the selected one of the block devices according to the second address portion;

identify an offset, and perform a division operation to identify from the offset:

one of the N logical units from the group corresponding to the selected logical subdivision,

one of the physical erase units in the subset which is respective to the selected logical subdivision, and

a physical page in the identified one of the physical erase units; and

service the incoming data write request by accessing the identified one of the physical erase units and storing accompanying write data in the identified physical page;

wherein:

the storage drive further comprises at least one register to store a size, for at least one of the logical subdivisions, indicating an amount of storage space that is to be physically erased; and

the circuitry is further operable to:

transmit, to a host, information which conveys the size; and

receive and execute at least one command issued by the host, wherein the at least one command causes the circuitry to control targeted physical erasure of a specific portion of the flash memory corresponding to the amount of the storage space that is to be physically erased.

24 . The storage drive of claim 23 , wherein the circuitry is further operable to derive a third address portion from the corresponding address information, wherein the offset is selected dependent on the third address portion.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2024
From: RADIAN MEMORY SYSTEMS, INC.
To: RADIAN MEMORY SYSTEMS LLC
Reel/Frame 067471/0240 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2024
From: KUZMIN, ANDREY V.; ROBERTSON, CRAIG; LERCARI, ROBERT; JADON, MIKE; CHEN, ALAN
To: RADIAN MEMORY SYSTEMS, LLC
Reel/Frame 066011/0096 →
CHANGE OF NAME Recorded Jan 3, 2024
From: RADIAN MEMORY SYSTEMS, LLC
To: RADIAN MEMORY SYSTEMS, INC.
Reel/Frame 066189/0950 →
Continuity (10)
Continuation 17469758 · Sep 8, 2021
Division 16808304 · Mar 3, 2020
Continuation 15690006 · Aug 29, 2017
Continuation 15074778 · Mar 18, 2016
Continuation 14880529 · Oct 12, 2015
Continuation In Part 14848273 · Sep 8, 2015
Provisional Application 62199969 · Jul 31, 2015
Provisional Application 62194172 · Jul 17, 2015
Provisional Application 62063357 · Oct 13, 2014
Provisional Application 62048162 · Sep 9, 2014
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