AMPLIFIER WITH TEMPERATURE DEPENDENT GAIN AND TEMPERATURE COMPENSATED BANDWIDTH

1 . An amplification circuit, comprising:

an operational amplifier having a first input, a second input, and an output;

an input resistor having a first resistance coupled to the first input;

a feedback resistor having a second resistance coupled between the output and the first input;

wherein the operational amplifier includes a differential input circuit coupled to the first and second inputs and biased by a bias current; and

a bias current generator circuit comprising:

a proportional to absolute temperature (PTAT) current generator configured to generate a PTAT current;

a first resistor having a resistance substantially equal to a sum of the first and second resistances;

wherein the PTAT current is applied to the first resistor to generate a reference voltage;

a voltage-to-current converter circuit configured to convert the reference voltage to a reference current generated as a function of a second resistor having a resistance substantially equal to the first resistance; and

a mirroring circuit configured to mirror the reference current to generate said bias current.

2 . The amplification circuit of claim 1 , wherein a mirroring ratio of the reference current to said bias current is 1:k, where k is smaller, larger or equal 1, and non-zero.

3 . The amplification circuit of claim 1 , wherein the voltage-to-current converter circuit comprises:

a differential amplifier having a first input, a second input, and an output;

wherein the first input is coupled to receive the reference voltage;

an output transistor having a control terminal coupled to the output of the differential amplifier;

a feedback connection between a conduction terminal of the output transistor and the second input of the differential amplifier; and

wherein said second resistor is coupled between the conduction terminal of the output transistor and a supply reference node, with said reference current flowing through said second resistor.

4 . A circuit, comprising:

an amplifier circuit having a gain setting network formed by an input resistor and a feedback resistor;

wherein said amplifier circuit includes a differential input circuit that is tail biased by a bias current; and

a bias current generator circuit comprising:

a proportional to absolute temperature (PTAT) current generator coupled in series with a first resistor to generate a reference voltage;

wherein the first resistor has a temperature dependent resistance substantially equal to a sum of temperature dependent resistances of the input and feedback resistors;

a voltage-to-current converter circuit configured to convert the reference voltage to a reference current applied across a second resistor;

wherein the second resistor has a temperature dependent resistance substantially equal to the temperature dependent resistance of the input resistor; and

a mirroring circuit configured to mirror the reference current to generate said bias current.

5 . The circuit of claim 4 , wherein a mirroring ratio of the reference current to said bias current is 1:k, where k is smaller, larger or equal 1, and non-zero.

6 . The circuit of claim 4 , wherein the voltage-to-current converter circuit comprises:

a differential amplifier coupled to receive the reference voltage;

an output transistor having a control terminal coupled to an output of the differential amplifier;

a feedback connection between a conduction terminal of the output transistor and an input of the differential amplifier; and

wherein said second resistor is coupled between the conduction terminal of the output transistor and a supply reference node, with said reference current flowing through said second resistor.

7 . A circuit, comprising:

an operational amplifier (OPAMP) with a gain setting network formed by an input resistor with a first resistance R 1 and a feedback resistor with a second resistance R 2 ;

wherein said OPAMP has a bandwidth set as a function of a transconductance of an input stage of said OPAMP multiplied by a first factor equal to

R

⁢

1

R

⁢

1

+

R

⁢

2

 as set by said gain setting network;

wherein the transconductance is dependent on a tail current configured to bias the input stage of said OPAMP; and

a bias current generator circuit configured to generate said tail current as a function of a second factor substantially equal to

R

⁢

1

+

R

⁢

2

R

⁢

1

.

8 . The circuit of claim 7 , wherein said second factor is

R

⁢

1

+

R

⁢

2

R

⁢

1

set by a first resistor of the bias current generator circuit having a third resistance R 3 substantially equal to a sum of the first resistance R 1 and second resistance R 2 and a second resistor of the bias current generator circuit having a fourth resistance R 4 substantially equal to the first resistance R 1 .

9 . The circuit of claim 7 , wherein said bias current generator circuit comprises:

a proportional to absolute temperature (PTAT) current generator coupled in series with a first resistor to generate a reference voltage;

wherein the first resistor has a third resistance R 3 substantially equal to a sum of the first resistance R 1 and second resistance R 2 ;

a voltage-to-current converter circuit configured to convert the reference voltage to a reference current applied across a second resistor;

wherein the second resistor has a fourth resistance R 4 substantially equal to the first resistance R 1 ; and

a mirroring circuit configured to mirror the reference current to generate said tail current.

10 . The circuit of claim 9 , wherein a mirroring ratio of the reference current to said tail current is 1:k, where k is smaller, larger or equal 1, and non-zero.