Post-sampling selectable gain in sample and hold analog-to-digital converters

1 . A method comprising:

scaling down or scaling up a reference voltage to generate a plurality of candidate voltages associated with a plurality of measurement accuracies of a sampler circuit, each candidate voltage of the plurality of candidate voltages is respectively associated with a respective measurement accuracy of the plurality of measurement accuracies, wherein scaling down or scaling up the reference voltage comprises generating, based on a plurality of gain levels, the plurality of candidate voltages, each candidate voltage is respectively associated with a respective gain level of the plurality of gain levels;

selecting, by one or more processors and based on an input voltage for the sampler circuit, a particular candidate voltage from the plurality of candidate voltages that is associated with an optimal measurement accuracy of the plurality of measurement accuracies; and

generating a sampler voltage associated with the optimal measurement accuracy by operating the sampler circuit based on the particular candidate voltage or an additional voltage associated with the particular candidate voltage.

2 . The method of claim 1 , further comprising:

determining the input voltage for the sampler circuit by reading a measurement value associated with the input voltage from a register location or a memory location.

3 . The method of claim 1 , further comprising:

determining the input voltage for the sampler circuit by sampling the input voltage.

4 . The method of claim 1 , wherein selecting, based on the input voltage for the sampler circuit, the particular candidate voltage from the plurality of candidate voltages comprises:

comparing the plurality of candidate voltages to the input voltage to generate a plurality of difference voltages;

determining that a particular difference voltage of the plurality of difference voltages is less than all other difference voltages of the plurality of difference voltages; and

determining that the particular difference voltage is associated with the particular candidate voltage.

5 . The method of claim 1 , wherein generating the sampler voltage by operating the sampler circuit based on the particular candidate voltage further comprising:

providing the particular candidate voltage to the sampler circuit; and

generating, using a first digital-to-analog converter (DAC) of the sampler circuit, a first DAC voltage; and

generating, using the sampler circuit, the sampler voltage based on the first DAC voltage.

6 . The method of claim 5 , further comprising:

providing the particular candidate voltage to a second sampler circuit; and

generating, using a second DAC of the second sampler circuit, a second DAC voltage; and

generating, using the second sampler circuit, the sampler voltage based on the second DAC voltage.

7 . The method of claim 1 , wherein generating the sampler voltage by operating the sampler circuit based on the additional voltage associated with the particular candidate voltage further comprising:

generating, using a single digital-to-analog converter (DAC), the additional voltage based on the particular candidate voltage; and

providing the additional voltage to the sampler circuit,

adjusting, using the sampler circuit, the sampler voltage based on the additional voltage.

8 . The method of claim 7 , further comprising:

providing the additional voltage to a second sampler circuit,

adjusting, using the second sampler circuit, the sampler voltage based on the additional voltage.

9 . The method of claim 1 , further comprising:

detecting, after generating the sampler voltage, that the input voltage for the sampler circuit changed to an updated input voltage;

selecting, based on the updated input voltage, a different candidate voltage from the plurality of candidate voltages that is associated with a different measurement accuracy of the plurality of measurement accuracies; and

generating a different sampler voltage associated with the different measurement accuracy by operating the sampler circuit based on the different candidate voltage or a different voltage associated with the different candidate voltage.

10 . An integrated circuit, comprising:

a plurality of reference generators;

a reference selector coupled to the plurality of reference generators;

one or more processors coupled to the reference selector; and

a sampler circuit coupled to the reference selector,

wherein the plurality of reference generators is configured to:

scale down or scale up a reference voltage to generate a plurality of candidate voltages associated with a plurality of measurement accuracies of a sampler circuit, each candidate voltage of the plurality of candidate voltages is respectively associated with a respective measurement accuracy of the plurality of measurement accuracies;

wherein the one or more processors are configured to:

select, using the reference selector and based on an input voltage for the sampler circuit, a particular candidate voltage from the plurality of candidate voltages that is associated with an optimal measurement accuracy of the plurality of measurement accuracies; and

wherein the sampler circuit is configured to:

generate a sampler voltage associated with the optimal measurement accuracy by operating the sampler circuit based on the particular candidate voltage or an additional voltage associated with the particular candidate voltage.

11 . The integrated circuit of claim 10 , wherein to scale down or scale up the reference voltage to generate the plurality of candidate voltages, the plurality of reference generators is further configured to:

generate, based on a plurality of gain levels, the plurality of candidate voltages, each candidate voltage is respectively associated with a respective gain level of the plurality of gain levels.

12 . The integrated circuit of claim 10 , wherein one or more processors are further configured to:

determine the input voltage for the sampler circuit by reading a measurement value associated with the input voltage from a register location or a memory location.

13 . The integrated circuit of claim 10 , wherein one or more processors are further configured to:

determine the input voltage for the sampler circuit by sampling the input voltage.

14 . The integrated circuit of claim 10 , wherein to select the particular candidate voltage from the plurality of candidate voltages, the one or more processors are further configured to:

compare the plurality of candidate voltages to the input voltage to generate a plurality of difference voltages;

determine that a particular difference voltage of the plurality of difference voltages is less than all other difference voltages of the plurality of difference voltages; and

determine that the particular difference voltage is associated with the particular candidate voltage.

15 . The integrated circuit of claim 10 , wherein the sampler circuit further comprises a first digital-to-analog converter (DAC) configured to generate a first DAC voltage; and

wherein the sampler circuit is further configured to:

generate, using the sampler circuit, the sampler voltage based on the first DAC voltage.

16 . The integrated circuit of claim 15 , further comprising a second sampler circuit coupled to the reference selector, the second sampler circuit further comprises a second DAC configured to generate a second DAC voltage; and

wherein the second sampler circuit is further configured to:

generate, using the second sampler circuit, the sampler voltage based on the second DAC voltage.

17 . The integrated circuit of claim 10 , further comprising:

a single digital-to-analog converter (DAC) configured to generate the additional voltage based on the particular candidate voltage; and

wherein the sampler circuit is further configured to:

adjust the sampler voltage based on the additional voltage.

18 . The integrated circuit of claim 10 , further comprising a second sampler circuit coupled to the reference selector, and

wherein the one or more processors are further configured to:

detect, after generating the sampler voltage, that the input voltage for the sampler circuit changed to an updated input voltage;

select, using the reference selector and based on the updated input voltage, a different candidate voltage from the plurality of candidate voltages that is associated with a different measurement accuracy of the plurality of measurement accuracies; and

wherein the second sampler circuit configured to:

generate a different sampler voltage associated with the different measurement accuracy by operating the sampler circuit based on the different candidate voltage or a different voltage associated with the different candidate voltage.

19 . A method comprising:

receiving a plurality of candidate voltages associated with a plurality of measurement accuracies of a sampler circuit, each candidate voltage of the plurality of candidate voltages is respectively associated with a respective measurement accuracy of the plurality of measurement accuracies;

selecting a particular candidate voltage from the plurality of candidate voltages that is associated with an optimal measurement accuracy of the plurality of measurement accuracies; and

forwarding the particular candidate voltage to permit a sampler circuit to generate, based on the particular candidate voltage, a sampler voltage associated with the optimal measurement accuracy.