Method of selectively transferring semiconductor device

1. A semiconductor structure, comprising:

a substrate;

an adhesion layer, arranged on the substrate;

a first release layer, arranged on the adhesion layer;

a first semiconductor device, comprising a semiconductor epitaxial stack having a top surface, and a conducting structure directly connected to the first release layer;

an electrode arranged on the semiconductor epitaxial stack; and

an insulating layer arranged on the semiconductor epitaxial stack,

wherein the first semiconductor device is not electrically connected to the substrate by the adhesion layer and the first release layer, and the electrode and the insulating layer are overlapped in a direction parallel to the top surface.

2. The semiconductor structure according to claim 1 , wherein the adhesion layer comprises a first post portion and a second post portion which are separated from each other, and arranged between the substrate and the first semiconductor device.

3. The semiconductor structure according to claim 2 , wherein the first post portion comprises a top surface facing the first semiconductor device, and a side surface, and the top surface and the side surface are covered by the first release layer.

4. The semiconductor structure according to claim 2 , wherein first post portion and the second post portion are laterally separated from each other by a gap.

5. The semiconductor structure according to claim 1 , further comprising a second semiconductor device arranged on the substrate and laterally separated from the first semiconductor device.

6. The semiconductor structure according to claim 1 , wherein the adhesion layer and the first release layer comprise different materials.

7. The semiconductor structure according to claim 1 , wherein the adhesion layer comprises Au, Pt, Cr, Al, Ag, In, Sn or a combination thereof.

8. The semiconductor structure according to claim 1 , wherein the first release layer comprises ITO, CTO, ATO, IZO, AZO, ZTO, ZnO or graphene.

9. The semiconductor structure according to claim 1 , wherein in a top view, a ratio of the electrode to the top surface is lower than 10%.

10. The semiconductor structure according to claim 1 , wherein the conducting structure comprises a metal layer directly connected to the semiconductor epitaxial stack.

11. The semiconductor structure according to claim 10 , wherein the metal layer comprises Au, Be, Al, Ge, Ni, Ti, Pt, Ni, Co, Fe or the combination thereof.

12. The semiconductor structure according to claim 2 , wherein a width of the first post portion is less than a width of the semiconductor epitaxial stack.

13. The semiconductor structure according to claim 12 , wherein a width of the second post portion is less than the width of the semiconductor epitaxial stack.

14. The semiconductor structure according to claim 10 , wherein the metal layer comprises Au, Be, Al, Ge, Ni, Ti, Pt, Ni, Co, Fe or the combination thereof.

15. The semiconductor structure according to claim 10 , wherein the conducting structure further comprises a transparent conductive layer.

16. The semiconductor structure according to claim 1 , wherein the adhesion layer has a first width and a second width less than the first width.

17. The semiconductor structure according to claim 1 , wherein the semiconductor epitaxial stack has a third width, and the third width is less than the second width.

18. The semiconductor structure according to claim 1 , wherein the insulating layer comprises SiO x , SiN x , SiON, Al 2 O 3 or the combination thereof.

19. The semiconductor structure according to claim 1 , wherein the adhesion layer comprises BCB.

20. The semiconductor structure according to claim 1 , wherein the electrode is on a center of the top surface.