Storage device and memory system

1. A storage device comprising:

a non-volatile memory; and

a memory controller configured to:

store a plurality of parameters for setting different operating conditions in the non-volatile memory;

analyze an access pattern indicating a tendency to access the non-volatile memory by a command from a host device;

select an optimal parameter from among the plurality of parameters based on the access pattern analyzed;

access the non-volatile memory in a state where the optimal parameter is set in the non-volatile memory; and

present the optimal parameter to the host device, wherein when the host device instructs a change to the optimal parameter in response to a presentation by the memory controller, the memory controller accesses the non-volatile memory in a state where the optimal parameter is set in the non-volatile memory, and wherein the memory controller transmits information to the host device, the information including the optimal parameter in a response to a read command, a write command, a synchronized cache command, or an UNMAP command conforming to a universal flash storage (UFS) standard.

2. The storage device according to claim 1 , wherein the memory controller is configured to analyze at least one of an access pattern when writing data to the non-volatile memory by the command from the host device and an access pattern when reading data from the non-volatile memory by the command from the host device.

3. The storage device according to claim 1 , wherein the memory controller is configured to store the plurality of parameters transmitted from the host device.

4. The storage device according to claim 1 , wherein, when the optimal parameter is selected, the memory controller accesses the non-volatile memory without checking with the host device in a state where the optimal parameter is set in the non-volatile memory.

5. The storage device according to claim 1 , further comprising a write buffer being configured to store change instruction information about the change to the optimal parameter from the host device, the write buffer conforming to the UFS standard, wherein

when the change instruction information is stored in the write buffer, the memory controller accesses the non-volatile memory in a state where the optimal parameter is set in the non-volatile memory.

6. The storage device according to claim 1 , wherein the non-volatile memory is a NAND flash memory.

7. The storage device according to claim 1 , wherein

the non-volatile memory includes a word line and a plurality of memory cells connected to the word line, and

the operating condition includes a pulse width of a voltage applied to the word line when data is written to the plurality of memory cells.

8. The storage device according to claim 1 , wherein

the non-volatile memory includes a word line and a plurality of memory cells connected to the word line, and

the operating condition includes a voltage amplitude of a voltage applied to the word line when data is written to the plurality of memory cells.

9. The storage device according to claim 1 , wherein

the non-volatile memory includes a word line and a plurality of memory cells connected to the word line, and

the operating condition includes a pulse width of a voltage applied to the word line when data is read from the plurality of memory cells.

10. The storage device according to claim 1 , wherein

the non-volatile memory includes a word line and a plurality of memory cells connected to the word line, and

the operating condition includes a voltage amplitude of a voltage applied to the word line when data is read from the plurality of memory cells.

11. The storage device according to claim 1 , wherein

the non-volatile memory includes a word line and a plurality of memory cells connected to the word line, and

the operating condition includes at least one of:

a pulse width of a voltage applied to the word line when data is written to the plurality of memory cells,

a voltage amplitude of a voltage applied to the word line when data is written to the plurality of memory cells,

a pulse width of a voltage applied to the word line when data is read from the plurality of memory cells, or

a voltage amplitude of a voltage applied to the word line when data is read from the plurality of memory cells.

12. A storage device comprising:

a non-volatile memory; and

a memory controller configured to:

store a plurality of parameters for setting different operating conditions in the non-volatile memory;

analyze an access pattern indicating a tendency to access the non-volatile memory by a command from a host device;

select an optimal parameter from among the plurality of parameters based on the access pattern analyzed;

access the non-volatile memory in a state where the optimal parameter is set in the non-volatile memory;

analyze any one of a first access pattern in which an amount of access to the non-volatile memory per unit time is larger than a threshold value and a second access pattern in which the amount of access to the non-volatile memory per unit time is equal to or less than the threshold value; and

select a first parameter prioritizing improvement in an access speed over a decrease in an error rate when the access pattern is analyzed as the first access pattern by the memory controller, and select a second parameter prioritizing the decrease in the error rate over the improvement in the access speed when the access pattern is analyzed as the second access pattern.

13. The storage device according to claim 12 , wherein

the access speed is a speed of writing to the non-volatile memory, and

the first parameter is for decreasing the number of times of programming when writing data to the non-volatile memory or for increasing the number of bits for which reading is omitted during a verification read more than the second parameter.

14. The storage device according to claim 12 , wherein

the access speed is a speed of reading from the non-volatile memory, and

the first parameter shortens a lifetime of the non-volatile memory more than the second parameter.

15. The storage device according to claim 12 , wherein the threshold value is designated by the host device.

16. A storage device comprising:

a non-volatile memory; and

a memory controller configured to:

store a plurality of parameters for setting different operating conditions in the non-volatile memory;

analyze an access pattern indicating a tendency to access the non-volatile memory by a command from a host device;

select an optimal parameter from among the plurality of parameters based on the access pattern analyzed;

access the non-volatile memory in a state where the optimal parameter is set in the non-volatile memory; and

analyze any one of a third access pattern in which a command transmission interval to the non-volatile memory from the host device is shorter than a threshold value and a fourth access pattern in which the command transmission interval to the non-volatile memory from the host device is equal to or longer than the threshold value.

17. The storage device according to claim 16 , wherein the memory controller is configured to lengthen a time required for transitioning to a power saving mode when the access pattern is analyzed as the third access pattern more than a time required for transitioning to the power saving mode when the access pattern is analyzed as the fourth access pattern.