IP Library Granted Patent US 12,489,458
Granted Patent B2
US 12,489,458 · App. 18/452,458 · Granted Dec 2, 2025

Integrated circuit

Inventor: Takeshi Koike (Saitama, JP)
Assignee: Wacom Co., Ltd.
H03M3/40G06F3/038G06F3/04162G06F3/0441H03M3/344H03M3/43H03M3/464
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Quick Facts
Patent No.
US 12,489,458
App. No.
18/452,458
Granted
Dec 2, 2025
Kind
B2
Abstract

A delta-sigma modulation circuit is enabled to be used to detect a pen signal. An integrated circuit according to the present disclosure is a sensor controller that detects pen signals transmitted from an active pen. The integrated circuit includes a delta-sigma modulation circuit including a subtractor that subtracts a feedback signal from a received signal input from a sensor, an integrator that integrates an output signal of the subtractor, a quantizer that quantizes an output signal of the integrator, and a digital analog converter that generates the feedback signal based on an output value of the quantizer. The integrated circuit also has a processor that detects a level of the received signal based on an output value of the delta-sigma modulation circuit, and a gain controller that a level of the feedback signal based on the level of the received signal detected by the processor.

Claims (52)

1 . An integrated circuit that detects a pen signal transmitted from an active pen, the integrated circuit comprising:

a delta-sigma modulation circuit including:

a subtractor that, in operation, subtracts a feedback signal from the pen signal that is input from a sensor,

an integrator that, in operation, integrates an output signal of the subtractor,

a quantizer that, in operation, quantizes an output signal of the integrator, and

a digital analog converter that, in operation, generates the feedback signal based on an output value of the quantizer;

a processor that, in operation, detects a level of the pen signal based on an output value of the delta-sigma modulation circuit;

a gain controller that, in operation, controls a level of the feedback signal based on the level of the pen signal detected by the processor; and

a gain adjustment circuit that, in operation, generates the output value of the delta-sigma modulation circuit by adjusting a gain of the output value of the quantizer,

wherein the digital analog converter, in operation, generates the feedback signal based on the output value of the delta-sigma modulation circuit, and

wherein the gain controller, in operation, controls the level of the feedback signal and the output value of the delta-sigma modulation circuit by controlling the gain of the gain adjustment circuit based on the level of the pen signal detected by the processor.

2 . The integrated circuit according to claim 1 , wherein the delta-sigma modulation circuit, in operation, performs 1-bit delta-sigma modulation for which the quantizer is constituted by one comparator.

3 . The integrated circuit according to claim 1 , wherein the gain controller, in operation, controls the level of the feedback signal by controlling the digital analog converter based on the level of the pen signal detected by the processor.

4 . The integrated circuit according to claim 1 , wherein, in the delta-sigma modulation circuit, the subtractor, the integrator, and the quantizer are configured by analog circuits, and the gain adjustment circuit is configured by a digital circuit.

5 . The integrated circuit according to claim 1 , wherein the processor includes a low-pass filter that, in operation, restores the pen signal based on the output value of the delta-sigma modulation circuit and a quadrature demodulation circuit that, in operation, performs quadrature detection of the pen signal restored by the low-pass filter, and

the processor, in operation, detects the level by using a result of the quadrature detection.

6 . An integrated circuit that detects a pen signal transmitted from an active pen, the integrated circuit comprising:

a delta-sigma modulation circuit including:

a subtractor that, in operation, subtracts a feedback signal from the pen signal that is input from a sensor,

an integrator that, in operation, integrates an output signal of the subtractor,

a quantizer that, in operation, quantizes an output signal of the integrator, and

a digital analog converter that, in operation, generates the feedback signal based on an output value of the quantizer;

a processor that, in operation, detects a level of the pen signal based on an output value of the delta-sigma modulation circuit; and

a gain controller that, in operation, controls a level of the feedback signal based on the level of the pen signal detected by the processor,

wherein the processor includes a low-pass filter that, in operation, restores the pen signal based on the output value of the delta-sigma modulation circuit and a quadrature demodulation circuit that, in operation, performs quadrature detection of the pen signal restored by the low-pass filter,

wherein the processor, in operation, detects the level by using a result of the quadrature detection, and

wherein the processor, in operation, detects the level by performing statistical processing of a level derived using the result of the quadrature detection.

7 . The integrated circuit according to claim 6 , wherein the statistical processing is smoothing processing that smooths the level derived using the result of the quadrature detection or prediction processing that predicts a future level based on the derived level.

8 . The integrated circuit according to claim 6 , wherein the processor includes a noise filter that, in operation, removes noise from an output signal of the quadrature demodulation circuit, and

wherein the processor, in operation, detects the level based on the output signal of the quadrature demodulation circuit, the output signal being obtained before noise thereof is removed by the noise filter.

9 . The integrated circuit according to claim 6 , wherein the processor includes a plurality of quadrature demodulation circuits that, in operation, perform quadrature detection at frequencies different from each other, and

wherein the processor detects the level for each of the quadrature demodulation circuits.

10 . The integrated circuit according to claim 9 , wherein the gain controller includes a level determination circuit that, in operation, determines the level of the pen signal to be used to control the level of the feedback signal, based on a plurality of levels detected by the processor.

11 . The integrated circuit according to claim 10 , wherein the level determination circuit, in operation, performs a summation process of summing the plurality of levels detected by the processor or a selection process of selecting one of the plurality of levels detected by the processor, to determine the level of the pen signal to be used to control the level of the feedback signal.

12 . The integrated circuit according to claim 6 , wherein the delta-sigma modulation circuit, in operation, performs 1-bit delta-sigma modulation for which the quantizer is constituted by one comparator.

13 . The integrated circuit according to claim 6 , wherein the gain controller, in operation, controls the level of the feedback signal by controlling the digital analog converter based on the level of the pen signal detected by the processor.

14 . The integrated circuit according to claim 6 , wherein the processor includes a low-pass filter that, in operation, restores the pen signal based on the output value of the delta-sigma modulation circuit and a quadrature demodulation circuit that, in operation, performs quadrature detection of the pen signal restored by the low-pass filter, and

the processor, in operation, detects the level by using a result of the quadrature detection.

15 . An integrated circuit that detects a pen signal transmitted from an active pen, the integrated circuit comprising:

a delta-sigma modulation circuit including:

a subtractor that, in operation, subtracts a feedback signal from the pen signal that is input from a sensor,

an integrator that, in operation, integrates an output signal of the subtractor,

a quantizer that, in operation, quantizes an output signal of the integrator,

a digital analog converter that, in operation, generates the feedback signal based on an output value of the quantizer,

a comparator that, in operation, detects that an absolute value of a level of the output signal of the integrator exceeds a predetermined value, and

an adder that, in operation, controls the level of the feedback signal in a case where the comparator detects that the absolute value of the level of the output signal of the integrator exceeds the predetermined value;

a processor that, in operation, detects a level of the pen signal based on an output value of the delta-sigma modulation circuit; and

a gain controller that, in operation, controls a level of the feedback signal based on the level of the pen signal detected by the processor.

16 . The integrated circuit according to claim 15 , wherein the delta-sigma modulation circuit, in operation, performs 1-bit delta-sigma modulation for which the quantizer is constituted by one comparator.

17 . The integrated circuit according to claim 15 , wherein the gain controller, in operation, controls the level of the feedback signal by controlling the digital analog converter based on the level of the pen signal detected by the processor.

18 . The integrated circuit according to claim 15 , wherein the processor includes a low-pass filter that, in operation, restores the pen signal based on the output value of the delta-sigma modulation circuit and a quadrature demodulation circuit that, in operation, performs quadrature detection of the pen signal restored by the low-pass filter, and

the processor, in operation, detects the level by using a result of the quadrature detection.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2023
From: KOIKE, TAKESHI
To: WACOM CO., LTD.
Reel/Frame 064727/0201 →
Continuity (2)
Continuation PCTJP2021024202 · Jun 25, 2021
Related Publication 20240007126A1 · Jan 4, 2024
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