WIDEBAND SWITCHING GAIN ENHANCED TUNABLE LNA ARCHITECTURE
Low noise amplifier (LNA) architectures addressing the parasitic challenges in the circuit in order to meet the high gain and bandwidth requirement at higher frequencies are disclosed. The described LNAs include cascode transistors and implement a tunable inductor in series with the gate terminal of a transistor of the cascode transistors to improve the gain and bandwidth of the LNAs and achieve high gain wideband switching LNAs.
1 . A low noise amplifier (LNA) comprising:
a first transistor and a second transistor arranged in a series configuration, and
a tunable inductor coupling a gate terminal of the second transistor to ground;
wherein:
the LNA is configured to receive an input signal at an input terminal coupled to the first transistor, and to generate an amplified signal at an output terminal coupled to the second transistor; and
the tunable inductor is configured such that a gate-source voltage of the second transistor generated in presence of the tunable inductor is larger than a gate-source voltage of the second transistor generated in absence of the tunable inductor.
2 . The LNA of claim 1 , wherein the tunable inductor is further configured to resonate out parasitics present at a source terminal of the second transistor.
3 . The LNA of claim 1 , further comprising an input matching circuit inclusive of a series and a shunt inductor.
4 . The LNA of claim 1 , further including a degenerative inductor coupling a source terminal of the first transistor to ground.
5 . The LNA of claim 4 , wherein the degenerative inductor is adjustable and/or selectively switchable.
6 . The LNA of claim 1 , further including a feedback element coupling a drain terminal of the second transistor to a gate terminal of the first transistor.
7 . The LNA of claim 6 , wherein the feedback element comprises a series configuration of a feedback inductor and a direct coupling (DC) capacitor.
8 . The LNA of claim 7 , wherein the feedback inductor is adjustable and/or selectively switchable.
9 . The LNA of claim 1 , further including an output matching circuit coupled to a drain terminal of the second transistor and to the output terminal.
10 . The LNA of claim 1 , wherein a resonance frequency of a combination of the tunable inductor and a gate-source capacitance of the second transistor is less than an operating frequency of the LNA.
11 . A low noise amplifier (LNA) comprising:
a first transistor and a second transistor, and
a first tunable inductor coupling a drain terminal of the first transistor to a source-terminal of the second transistor;
wherein:
the LNA is configured to receive an input signal at an input terminal coupled to the first transistor, and to generate an amplified signal at an output terminal coupled to the second transistor; and
the first tunable inductor is configured such that a gate-source voltage of the second transistor generated in presence of the first tunable inductor is larger than a gate-source voltage of the second transistor generated in absence of the first tunable inductor.
12 . The LNA of claim 11 , wherein the first tunable inductor is configured to resonate out parasitics present at the source-terminal of the second transistor.
13 . The LNA of claim 11 , further comprising a second tunable inductor coupling a gate terminal of the second transistor to ground.
14 . The LNA of claim 13 , wherein the first tunable inductor and the second tunable inductor are inductively coupled.
15 . The LNA of claim 13 , wherein the first tunable inductor and the second tunable inductor are selectively switchable.
16 . The LNA of claim 13 , further comprising a degenerative inductor coupling a source-terminal of the first transistor to ground.
17 . The LNA of claim 16 , wherein the degenerative inductor is selectively switchable.
18 . A low noise amplifier (LNA) comprising:
a first transistor and two or more additional transistors, the first transistor and the two or more additional transistors being arranged in a series configuration, and
one or more tunable inductors coupling gate terminals of corresponding additional transistors of the two or more additional transistors to ground;
wherein:
the LNA is configured to receive an input signal at an input terminal coupled to the first transistor, and to generate an amplified signal at an output terminal coupled to an additional transistor; of the two or more additional transistors; and
the one or more tunable inductors are configured such that gate-source voltages of corresponding additional transistors of the two or more additional transistors generated in presence of the one or more tunable inductors are larger than gate-source voltages of said corresponding additional transistors of the two or more additional transistors generated in absence of the one or more tunable inductors.
19 . The LNA of claim 18 , wherein at least one tunable inductor of the one or more tunable inductors is selectively switchable.
20 .- 21 . (canceled)