IP Library Granted Patent US 12,596,394
Granted Patent B2
US 12,596,394 · App. 18/478,880 · Granted Apr 7, 2026

Systems and methods for enabling a feature of a semiconductor device

Inventors: Paul Blinzer (Bellevue, WA); Maulik Ojas Mankad (Bangalore, IN); Victor Ignatski (Markham, CA); Ashish Jain (Austin, TX); Gia Phan (Markham, CA); Ranjeet Kumar (Markham, CA)
Assignees: Advanced Micro Devices, Inc.; ATI Technologies ULC
G06F1/08G06F21/64G06F21/73H01L23/5256
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Quick Facts
Patent No.
US 12,596,394
App. No.
18/478,880
Granted
Apr 7, 2026
Kind
B2
Abstract

A computer-implemented method for enabling a feature of a semiconductor device can include receiving, by at least one processor of a semiconductor device, a command to enable a feature of the semiconductor device. The method can also include burning, by the at least one processor and in response to the command, an electronic fuse of the semiconductor device. Various other methods, systems, and computer-readable media are also disclosed.

Claims (53)

1 . A computing device, comprising: circuitry configured to:

receive a command to enable a feature of a semiconductor device; and

in response to the command to enable the feature,

enable the feature of the semiconductor device; and

detectably record receipt of the command to enable the feature, wherein detectably recording the receipt comprises burning an electronic fuse of the semiconductor device.

2 . The computing device of claim 1 , wherein burning the electronic fuse enables the feature.

3 . The computing device of claim 1 , wherein the computing device corresponds to a hardware root of trust of the semiconductor device.

4 . The computing device of claim 1 , wherein the computing device receives the command by interacting, via an application configured to provide the feature, with a network accessible secure service.

5 . The computing device of claim 4 , wherein the network accessible secure service is configured to:

establish a secure connection with an operating system in communication with the semiconductor device and running the application;

use a cryptographic signature to validate an integrity of a software infrastructure dealing with a setting of the feature as user-enabled;

receive a user selection to enable the feature from the application; and

securely instruct the computing device to burn the electronic fuse.

6 . The computing device of claim 1 , wherein the semiconductor device corresponds to a graphics processing unit and the feature corresponds to overclocking of the graphics processing unit.

7 . A system comprising:

a semiconductor device including a trusted microprocessor and an electronic fuse; and

an operating system in communication with the semiconductor device and configured to run an application that provides a feature of the semiconductor device,

wherein the trusted microprocessor is configured to:

receive a command to enable the feature of the semiconductor device; and

respond to receipt of the command to enable the feature by:

enabling the feature of the semiconductor device; and

detectably recording receipt of the command to enable the feature, wherein detectably recording the receipt comprises burning the electronic fuse.

8 . The system of claim 7 , wherein burning the electronic fuse enables the feature.

9 . The system of claim 7 , wherein the trusted microprocessor corresponds to a hardware root of trust of the semiconductor device.

10 . The system of claim 7 , wherein the trusted microprocessor receives the command by interacting, via the application, with a network accessible secure service.

11 . The system of claim 10 , wherein the network accessible secure service is configured to:

establish a secure connection with the operating system;

use a cryptographic signature to validate an integrity of a software infrastructure dealing with a setting of the feature as user-enabled;

receive a user selection to enable the feature from the application; and

securely instruct the trusted microprocessor to burn the electronic fuse.

12 . The system of claim 7 , wherein the semiconductor device corresponds to a graphics processing unit and the feature corresponds to overclocking of the graphics processing unit.

13 . A computer-implemented method comprising:

receiving, by at least one processor of a semiconductor device, a command to enable a feature of the semiconductor device; and

in response to the command to enable the feature,

enabling the feature of the semiconductor device; and

detectably recording receipt of the command to enable the feature, wherein detectably recording the receipt comprises burning, by the at least one processor, an electronic fuse of the semiconductor device.

14 . The computer-implemented method of claim 13 , wherein burning the electronic fuse enables the feature.

15 . The computer-implemented method of claim 13 , wherein the at least one processor corresponds to a hardware root of trust of the semiconductor device.

16 . The computer-implemented method of claim 13 , wherein the at least one processor receives the command by interacting, via an application configured to provide the feature, with a network accessible secure service.

17 . The computer-implemented method of claim 16 , wherein the network accessible secure service is configured to:

establish a secure connection with an operating system in communication with the semiconductor device and running the application;

use a cryptographic signature to validate an integrity of a software infrastructure dealing with a setting of the feature as user-enabled;

receive, from the application, a user selection to enable the feature; and

securely instruct the at least one processor to burn the electronic fuse.

18 . The computing device of claim 1 further comprising circuitry configured to:

query a state of the electronic fuse; and

in response to detecting that the state of the electronic fuse is burned, determine that the feature was user-enabled.

19 . The system of claim 7 , wherein the trusted microprocessor is further configured to:

query a state of the electronic fuse; and

in response to detecting that the state of the electronic fuse is burned, determine that the feature was user-enabled.

20 . The computer-implemented method of claim 13 , further comprising:

querying a state of the electronic fuse; and

in response to detecting that the state of the electronic fuse is burned, determining that the feature was user-enabled.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2023
From: BLINZER, PAUL; MANKAD, MAULIK OJAS; JAIN, ASHISH
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 065821/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2023
From: IGNATSKI, VICTOR; PHAN, GIA; KUMAR, RANJEET
To: ATI TECHNOLOGIES ULC
Reel/Frame 065821/0790 →
Continuity (1)
Related Publication 20250110525A1 · Apr 3, 2025
References Cited (17)
US 6385735B1 · Wilson · 2002 [cited by examiner]
US 7382366B1 · Klock · 2008 [cited by examiner]
US 7795899B1 · Grohoski · 2010 [cited by examiner]
US 9954516B1 · Li · 2018 [cited by examiner]
US 11531476B2 · Choi · 2022 [cited by examiner]
US 20070081620A1 · Beattie · 2007 [cited by examiner]
US 20070250219A1 · Gaskins · 2007 [cited by examiner]
US 20080030243A1 · Liao · 2008 [cited by examiner]
US 20080061817A1 · Erickson · 2008 [cited by examiner]
US 20090239500A1 · Aripirala · 2009 [cited by examiner]
US 20100223489A1 · Huang · 2010 [cited by examiner]
US 20110161706A1 · Huang · 2011 [cited by examiner]
US 20140189365A1 · Cox · 2014 [cited by examiner]
US 20210109562A1 · Ragland · 2021 [cited by examiner]
US 20240184890A1 · Agarwal · 2024 [cited by examiner]
US 20240220159A1 · Fang · 2024 [cited by examiner]
US 20240427368A1 · Koorapati · 2024 [cited by examiner]