IP Library Granted Patent US 12,217,699
Granted Patent B2
US 12,217,699 · App. 18/502,554 · Granted Feb 4, 2025

Display apparatus

Inventors: Gyungsoon Park (Yongin-si, KR); Sunhwa Lee (Yongin-si, KR); Hyunjoon Kim (Yongin-si, KR); Jaeyong Jang (Yongin-si, KR); Kyunghoon Chung (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G09G3/3266G09G3/3677H10K59/1213H10K59/1216H10K59/123H10K59/131G09G2310/0202
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Quick Facts
Patent No.
US 12,217,699
App. No.
18/502,554
Granted
Feb 4, 2025
Kind
B2
Abstract

A display apparatus includes a pixel part including a plurality of pixels, and a gate driving circuit. Each of the plurality of pixels is driven in one first scan period and one or more second scan periods during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency.

Claims (68)

1. A display apparatus comprising a plurality of pixels, each of the plurality of pixels comprising:

a first transistor;

a second transistor connected between a gate of the first transistor and a data line, a gate of the second transistor being connected to a first scan line;

a third transistor connected between the gate of the first transistor and a first voltage line, a gate of the third transistor being connected to a second scan line;

a fourth transistor connected between a second terminal of the first transistor and a second voltage line, a gate of the fourth transistor being connected to a third scan line;

a fifth transistor connected between a first terminal of the first transistor and a third voltage line, a gate of the fifth transistor being connected to a control line;

a first capacitor connected between the gate of the first transistor and the second terminal of the first transistor;

a second capacitor connected between the third voltage line and the second terminal of the first transistor; and

an organic light-emitting diode comprising an anode connected to the second terminal of the first transistor.

2. The display apparatus of claim 1 , wherein

each of the plurality of pixels is driven in one first scan period and at least one second scan period during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency,

a third second scan signal is supplied to the third scan line and a control signal is supplied to the control line according to the maximum driving frequency, and

a first scan signal is supplied to the first scan line and a second scan signal is supplied to the second scan line according to the first driving frequency.

3. The display apparatus of claim 2 , wherein in case that the first driving frequency is 1/n of the maximum driving frequency,

each of a number of the first scan signal supplied to the first scan line and a number of the second scan signal supplied to the second scan line is 1,

each of a number of the third second scan signal supplied to the third scan line and a number of the control signal supplied to the control line is n, and

n is a natural number.

4. The display apparatus of claim 2 , wherein a timing in which the third scan signal is supplied to the pixel in the first scan period and a timing in which the third scan signal is supplied to the pixel in the second scan period are substantially identical to each other.

5. The display apparatus of claim 2 , wherein

the first scan period comprises a first non-light-emitting period and a first light-emitting period, and

each of the at least one second scan period comprises a second non-light-emitting period and a second light-emitting period.

6. The display apparatus of claim 5 , wherein

the third scan signal is supplied to the third scan line before and after the first scan signal is supplied to the first scan line in the first non-light-emitting period of the first scan period,

the third scan signal is supplied to the third scan line twice in the second non-light-emitting period of the second scan period, and

a timing in which the third scan signal is supplied to the pixel in the first scan period and a timing in which the third scan signal is supplied to the pixel in the second scan period are substantially identical to each other.

7. The display apparatus of claim 5 , wherein the first scan period comprises:

a first period in which the second scan signal and the third scan signal each have a gate-on voltage level, and the first scan signal and the control signal each have a gate-off voltage level;

a second period in which the first scan signal and the third scan signal each have a gate-off voltage level, and the second scan signal and the control signal each have a gate-on voltage level;

a third period in which the first scan signal has a gate-on voltage level, and the second scan signal, the third scan signal, and the control signal each have a gate-off voltage level; and

a fourth period in which the first scan signal, the second scan signal, and the third scan signal each have a gate-off voltage level, and the control signal has a gate-on voltage level, and

wherein the fourth period is the first light-emitting period.

8. The display apparatus of claim 7 , wherein

the at least one second scan period comprises a fifth period in the second non-light-emitting period, and

in the fifth period, the second scan signal has a gate-on voltage level and the first scan signal, the third scan signal, and the control signal each have a gate-off voltage level.

9. The display apparatus of claim 8 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level once in the second scan period.

10. The display apparatus of claim 8 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the second scan period.

11. The display apparatus of claim 8 , wherein

the first scan period further comprises, between the third period and the fourth period, a sixth period in which the first scan signal, the second scan signal, and the control signal each have the gate-off voltage level, and the third scan signal has the gate-on voltage level, and

the at least one second scan period further comprises, subsequent to the fifth period before the control signal is shifted from the gate-off voltage level to the gate-on voltage level,

a seventh period in which the third scan signal has the gate-on voltage level.

12. The display apparatus of claim 11 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level once in the second scan period.

13. The display apparatus of claim 11 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the second scan period.

14. The display apparatus of claim 8 , wherein each of the plurality of pixels further comprises a third capacitor connected between the anode and a fourth voltage line.

15. The display apparatus of claim 14 , wherein a voltage supplied to the fourth voltage line is a voltage supplied to a cathode of the organic light-emitting diode or a voltage greater than a voltage supplied to the second voltage line.

16. The display apparatus of claim 14 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level once in the second scan period.

17. The display apparatus of claim 14 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the second scan period.

18. The display apparatus of claim 14 , wherein

the first scan period further comprises, between the third period and the fourth period, a sixth period in which the first scan signal, the second scan signal, and the control signal each have the gate-off voltage level, and the third scan signal has the gate-on voltage level, and

the at least one second scan period further comprises, subsequent to the fifth period before the control signal is shifted from the gate-off voltage level to the gate-on voltage level,

a seventh period in which the third scan signal has the gate-on voltage level.

19. The display apparatus of claim 18 , wherein

a fourth voltage of a low level is supplied to the fourth voltage line from before a start of the first period to after the sixth period in the first scan period,

the fourth voltage of a low level is supplied to the fourth voltage line from before a start of the fifth period to after the seventh period in the at least one second scan period, and

the fourth voltage of a high level is supplied to the fourth voltage line during the first light-emitting period and the second light-emitting period.

20. The display apparatus of claim 18 , wherein a timing in which the third scan signal is supplied to the pixel in the first scan period and a timing in which the third scan signal is supplied to the pixel in the second scan period are substantially identical to each other.

21. The display apparatus of claim 1 , wherein each of the first transistor to the fifth transistor is an N-channel oxide semiconductor transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2023
From: PARK, GYUNGSOON; LEE, SUNHWA; KIM, HYUNJOON; JANG, JAEYONG; CHUNG, KYUNGHOON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065469/0912 →
Priority Claims (1)
KR 10-2021-0191839 · Dec 29, 2021 · national
Continuity (2)
Continuation 18089790 · Dec 28, 2022
Related Publication 20240071317A1 · Feb 29, 2024
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