Slew rate control circuit and display driver IC including the same
A display driver integrated circuit comprising an operational amplifier configured to amplify an input voltage and generate an output voltage and a slew rate control circuit configured to generate a compensation current based on a difference between the input voltage and the output voltage and provide the generated compensation current to the operational amplifier, wherein the slew rate control circuit comprises a comparison circuit configured to compare the input voltage and the output voltage and generate a difference current corresponding to a difference between the input voltage and the output voltage, a pull-down circuit comprising a pull-down transistor group and configured to generate a pull-down compensation current by current-mirroring the generated difference current, and a pull-up circuit comprising a pull-up transistor group and configured to generate a pull-up compensation current by current-mirroring the generated difference current is provided.
1. A display driver integrated circuit comprising:
an operational amplifier configured to amplify an input voltage and generate an output voltage; and
a slew rate control circuit configured to generate a compensation current based on a difference between the input voltage and the output voltage and provide the generated compensation current to the operational amplifier,
wherein the slew rate control circuit comprises:
a comparison circuit configured to compare the input voltage and the output voltage and generate a difference current corresponding to a difference between the input voltage and the output voltage;
a pull-down circuit comprising a pull-down transistor group and configured to generate a pull-down compensation current by current-mirroring the generated difference current; and
a pull-up circuit comprising a pull-up transistor group and configured to generate a pull-up compensation current by current-mirroring the generated difference current, and
wherein a first pull-down transistor included in the pull-down transistor group is directly connected to the operational amplifier via a first pull-down output node, and a second pull-down transistor included in the pull-down transistor group and different from the first pull-down transistor is directly connected to the operational amplifier via a second pull-down output node that is different from the first pull-down output node, and
a first pull-up transistor included in the pull-up transistor group is directly connected to the operational amplifier via a first pull-up output node, and a second pull-up transistor included in the pull-up transistor group and different from the first pull-up transistor is directly connected to the operational amplifier via a second pull-up output node that is different from the first pull-up output node node;
wherein the operational amplifier comprises an upper circuit, a lower circuit, and a connection circuit connecting the upper circuit and the lower circuit;
wherein the upper circuit comprises a first upper current mirror circuit and a second upper current mirror circuit, and is connected to the first pull-up output node and the second pull-up output node, and
the lower circuit comprises a first lower current mirror circuit and a second lower current mirror circuit, and is connected to the first pull-down output node and the second pull-down output node;
wherein the first pull-up output node is connected between the first upper current mirror circuit and the second upper current mirror circuit,
the second pull-up output node is connected between the second upper current mirror circuit and the connection circuit,
the first pull-down output node is connected between the first lower current mirror circuit and the second lower current mirror circuit, and
the second pull-down output node is connected between the first lower current mirror circuit and the connection,
wherein a third pull-down transistor included in the pull-down transistor group and different from the first pull-down transistor and the second pull-down transistor is directly connected to the upper circuit of the operational amplifier via a third pull-down output node, and
a third pull-up transistor included in the pull-up transistor group and different from the first pull-up transistor and the second pull-up transistor is directly connected to the lower circuit of the operational amplifier via a third pull-up output node.
2. The display driver integrated circuit of claim 1 , wherein the third pull-up output node is connected between the first lower current mirror circuit and the second lower current mirror circuit, respectively, and
the third pull-down output node is connected to the first upper current mirror circuit and the second upper current mirror circuit, respectively.
3. The display driver integrated circuit of claim 2 , wherein the third pull-up output node and the third pull-down output node are connected to the operational amplifier at a location farther apart than the first pull-up output node, the second pull-up output node, the first pull-down output node, and the second pull-down output node based on the slew rate control circuit.