RF IMPEDANCE MATCHING NETWORK WITH CLAMPING CIRCUIT

1 . A radio frequency (RF) impedance matching circuit comprising:

an RF input configured to operably couple to an RF source providing an RF signal;

an RF output configured to operably couple to a plasma chamber;

at least one electronically variable capacitor (EVC), wherein each EVC of the at least one EVC comprises fixed capacitors, each of the fixed capacitors having a corresponding switching circuit for switching in and out the fixed capacitor to alter a total capacitance of the EVC; and

a control circuit configured to cause the switching in and out of the fixed capacitors of each EVC to enable an impedance match;

wherein each switching circuit for each fixed capacitor of each EVC comprises:

a switch comprising a PIN diode or an NIP diode;

a driver circuit operably coupled to the switch;

a filter operably coupled between the driver circuit and the switch; and

a clamping circuit operably coupled between the filter and the switch, the clamping circuit comprising a blocking device having a first terminal operably coupled to a clamping power supply and a distinct second terminal operably coupled to a terminal of the filter.

2 . The matching circuit of claim 1 wherein, for each switching circuit, the blocking device of the clamping circuit is a PIN diode or an NIP diode.

3 . The matching circuit of claim 1 , for each switching circuit, the blocking device of the clamping circuit has a low off-state capacitance so as to not affect the off-state isolation of the switch.

4 . The matching circuit of claim 1 wherein, for each switching circuit, the second terminal of the blocking device of the clamping circuit is electrically connected between the filter, the fixed capacitor, and the switch.

5 . The matching circuit of claim 1 , for each switching circuit, the filter comprises an inductor.

6 . The matching circuit of claim 5 wherein the filter comprises the inductor and a resistor coupled in series.

7 . The matching circuit of claim 1 , for each switching circuit, the driver circuit comprises:

a first power switch receiving a reverse bias voltage and configured to switchably connect the reverse bias voltage to a common output in response to a received input signal; and

a second power switch receiving a forward bias voltage and configured to switchably connect the forward bias voltage to the common output in response to a received input signal;

wherein a first terminal of the resonant filter is electrically coupled to the common output; and

wherein a second terminal of the resonant filter, distinct from the first terminal of the resonant filter, is electrically coupled to both a terminal of the blocking device of the clamping circuit and to a node between the fixed capacitor and the switch.

8 . The matching circuit of claim 7 wherein, for each switching circuit, to switch the switching circuit ON and thereby switch in the corresponding fixed capacitor, a DC current flows from the forward bias voltage through the switch.

9 . The matching circuit of claim 8 wherein the forward bias voltage and the switch are operably coupled to a common ground.

10 . A method of matching an impedance comprising:

coupling a radio frequency (RF) input of a matching circuit to an RF source providing an RF signal;

coupling an RF output of the matching circuit to a plasma chamber, wherein the matching circuit comprises:

at least one electronically variable capacitor (EVC), wherein each EVC of the at least one EVC comprises fixed capacitors, each of the fixed capacitors having a corresponding switching circuit for switching in and out the fixed capacitor to alter a total capacitance of the EVC; and

a control circuit configured to cause the switching in and out of the fixed capacitors of each EVC to enable an impedance match;

wherein each switching circuit for each fixed capacitor of each EVC comprises:

a switch comprising a PIN diode or an NIP diode;

a driver circuit operably coupled to the switch;

a filter operably coupled between the driver circuit and the switch; and

a clamping circuit operably coupled between the filter and the switch, the clamping circuit comprising a blocking device having a first terminal operably coupled to a clamping power supply and a distinct second terminal operably coupled to a terminal of the filter; and

matching an impedance by at least one of the switching circuits of the at least one EVC switching in or out its corresponding fixed capacitor to alter a total capacitance of the EVC.

11 . The method of claim 10 wherein, for each switching circuit, the blocking device of the clamping circuit is a PIN diode or an NIP diode.

12 . The method of claim 1 wherein, for each switching circuit, the blocking device of the clamping circuit has a low off-state capacitance so as to not affect the off-state isolation of the switch.

13 . The method of claim 12 wherein, for each switching circuit, the second terminal of the blocking device of the clamping circuit is electrically connected between the filter, the fixed capacitor, and the switch.

14 . The method of claim 1 wherein, for each switching circuit, the filter comprises an inductor.

15 . The method of claim 14 wherein the filter comprises the inductor and a resistor coupled in series.

16 . The method of claim 1 wherein, for each switching circuit, the driver circuit comprises:

a first power switch receiving a reverse bias voltage and configured to switchably connect the reverse bias voltage to a common output in response to a received input signal; and

a second power switch receiving a forward bias voltage and configured to switchably connect the forward bias voltage to the common output in response to a received input signal;

wherein a first terminal of the resonant filter is electrically coupled to the common output; and

wherein a second terminal of the resonant filter, distinct from the first terminal of the resonant filter, is electrically coupled to both a terminal of the blocking device of the clamping circuit and to a node between the fixed capacitor and the switch.

17 . The method of claim 16 wherein, for each switching circuit, to switch the switching circuit ON and thereby switch in the corresponding fixed capacitor, a DC current flows from the forward bias voltage through the switch.

18 . The method of claim 17 wherein the forward bias voltage and the switch are operably coupled to a common ground.

19 . A semiconductor processing tool comprising:

a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate; and

an impedance matching circuit operably coupled to the plasma chamber, the matching circuit comprising:

an RF input configured to operably couple to an RF source providing an RF signal;

an RF output configured to operably couple to the plasma chamber;

at least one electronically variable capacitor (EVC), wherein each EVC of the at least one EVC comprises fixed capacitors, each of the fixed capacitors having a corresponding switching circuit for switching in and out the fixed capacitor to alter a total capacitance of the EVC; and

a control circuit configured to cause the switching in and out of the fixed capacitors of each EVC to enable an impedance match;

wherein each switching circuit for each fixed capacitor of each EVC comprises:

a switch comprising a PIN diode or an NIP diode;

a driver circuit operably coupled to the switch;

a filter operably coupled between the driver circuit and the switch; and

a clamping circuit operably coupled between the filter and the switch, the clamping circuit comprising a blocking device having a first terminal operably coupled to a clamping power supply and a distinct second terminal operably coupled to a terminal of the filter.

20 . (canceled)