IP Library Patent Application 18579390
Patent Application
App. No. 18/579,390

SURGE PROTECTION CIRCUIT

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Quick Facts
Patent No.
US None
App. No.
18/579,390
Abstract

A surge protection circuit includes a first surge protection device (SPD) including a first terminal coupled to a voltage potential and a second terminal. A second SPD includes a first terminal coupled to the voltage potential and a second terminal. A diode array includes a first plurality of diodes, each diode of the first plurality of diodes including an anode coupleable to a respective power line of an electronic circuit and a cathode coupled to the second terminal of the first SPD. The diode array also includes a second plurality of diodes, each diode of the second plurality of diodes including a cathode coupled to a respective power line of the electronic circuit and an anode coupled to the second terminal of the second SPD. The second terminal of the first SPD is further coupled to a common power bus of the electronic circuit.

Claims (66)

1 . A surge protection circuit for an electronic circuit having a common power bus, a first power bus having a first voltage potential with respect to the common power bus, and a plurality of power lines providing power from the first power bus to a plurality of load devices coupled between the plurality of power lines and the common power bus, the surge protection circuit comprising:

a first surge protection device (SPD) comprising:

a first terminal coupled to a second voltage potential distinct from the first voltage potential; and

a second terminal;

a second SPD comprising:

a first terminal coupled to the second voltage potential; and

a second terminal

a diode array comprising:

a first plurality of diodes, each diode of the first plurality of diodes comprising:

an anode coupled to a respective power line of the plurality of power lines; and

a cathode coupled to the second terminal of the first SPD; and

a second plurality of diodes, each diode of the second plurality of diodes comprising:

a cathode coupled to a respective power line of the plurality of power lines; and

an anode coupled to the second terminal of the second SPD;

wherein the second terminal of the first SPD is further coupled to the common power bus.

2 . The surge protection circuit of claim 1 , wherein the second voltage potential comprises an earth ground.

3 . The surge protection circuit of claim 1 , wherein, in response to a positive voltage surge between a first power line of the plurality of power lines and the second voltage potential, the surge protection circuit is configured to direct a current flow of the positive voltage surge from the first power line through a first diode of the first plurality of diodes and through the first SPD to the second voltage potential.

4 . The surge protection circuit of claim 1 , wherein, in response to a negative voltage surge between a first power line of the plurality of power lines and the second voltage potential, the surge protection circuit is configured to direct a current flow of the negative voltage surge from the second voltage potential through the second SPD and through a first diode of the second plurality of diodes to the first power line.

5 . The surge protection circuit of claim 1 , wherein, in response to a negative voltage surge between the common power bus and the second voltage potential, the surge protection circuit is configured to direct a current flow of the negative voltage surge from the second voltage potential through the first SPD to the common power bus.

6 . The surge protection circuit of claim 1 , wherein, in response to a positive voltage surge between common power bus and the second voltage potential, the surge protection circuit is configured to direct a current flow of the positive voltage surge from the common power bus through the first SPD to the second voltage potential.

7 . The surge protection circuit of claim 1 , wherein the first voltage potential comprises a negative voltage potential.

8 . An electronic circuit comprising:

a common power bus;

a first power bus having a first voltage potential with respect to the common power bus;

a plurality of power lines configured to provide power from the first power bus to a plurality of load devices coupled between the plurality of power lines and the common power bus;

a surge protection circuit comprising:

a first SPD;

a second SPD coupled to the first SPD via a second voltage potential distinct from the first voltage potential;

a diode array comprising:

a first subset of diodes coupled between the plurality of power lines and the first SPD;

a second subset of diodes coupled between the plurality of power lines and the second SPD;

wherein the second terminal of the first SPD is further coupled to the common power bus.

9 . The electronic circuit of claim 8 , wherein the surge protection circuit lacks any additional SPD for directing current flow in response to a voltage surge.

10 . The electronic circuit of claim 8 , wherein:

the first SPD comprises:

a first terminal coupled to the second voltage potential; and

a second terminal coupled to a cathode of each diode of the first subset of diodes;

the second SPD comprises:

a first terminal coupled to the second voltage potential; and

a second terminal coupled to an anode of each diode of the second subset of diodes;

each diode of the first subset of diodes comprises an anode coupled to a respective power line of the plurality of power lines; and

each diode of the second subset of diodes comprises a cathode coupled to a respective power line of the plurality of power lines.

11 . The electronic circuit of claim 8 , wherein the second voltage potential comprises an earth ground.

12 . The electronic circuit of claim 11 further comprising an enclosure housing the surge protection circuit; and

wherein the enclosure is coupled with the earth ground.

13 . The electronic circuit of claim 8 , wherein:

in response to a positive voltage surge between a first power line of the plurality of power lines and the second voltage potential, the surge protection circuit is configured to direct a current flow of the positive voltage surge from the first power line through a first diode of the first subset of diodes and through the first SPD to the second voltage potential; and

in response to a negative voltage surge between a first power line of the plurality of power lines and the second voltage potential, the surge protection circuit is configured to direct a current flow of the negative voltage surge from the second voltage potential through the second SPD and through a first diode of the second subset of diodes to the first power line.

14 . The electronic circuit of claim 8 , wherein

in response to a negative voltage surge between the common power bus and the second voltage potential, the surge protection circuit is configured to direct a current flow of the negative voltage surge from the second voltage potential through the first SPD to the common power bus; and

in response to a positive voltage surge between common power bus and the second voltage potential, the surge protection circuit is configured to direct a current flow of the positive voltage surge from the common power bus through the first SPD to the second voltage potential.

15 . The electronic circuit of claim 8 , wherein the first voltage potential comprises a negative voltage potential.

16 . A method of protecting an electronic circuit having a common power bus, a first power bus having a first voltage potential with respect to the common power bus, and a plurality of power lines providing power from the first power bus to a plurality of load devices coupled between the plurality of power lines and the common power bus, the method comprising:

coupling a diode array to the plurality of power lines;

coupling a first SPD to the diode array, to a second voltage potential distinct from the first voltage potential, and to the common power bus; and

coupling second SPD to the diode array and to the second voltage potential.

17 . The method of claim 16 , wherein coupling the diode array to the plurality of power lines comprises:

coupling an anode of each diode of a first subset of diodes to the plurality of power lines;

coupling a cathode of each diode of the first subset of diodes together;

coupling a cathode of each diode of a second subset of diodes to the plurality of power lines; and

coupling an anode of each diode of the second subset of diodes together.

18 . The method of claim 16 , wherein coupling the first SPD to the second voltage potential comprises coupling the first SPD to an earth ground; and

wherein coupling the second SPD to the second voltage potential comprises coupling the second SPD to the earth ground.

19 . The method of claim 18 , wherein the electronic circuit further includes an enclosure housing the surge protection circuit; and

further comprising coupling the enclosure with the earth ground.

20 . The method of claim 16 , wherein the first voltage potential comprises a negative voltage potential.

Assignments (2)
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: ASTEC INTERNATIONAL LIMITED
To: AES GLOBAL HOLDINGS PTE, LTD.
Reel/Frame 070404/0918 →
CONFIRMATORY PATENT ASSIGNMENT Recorded Mar 5, 2025
From: AES GLOBAL HOLDINGS PTE. LTD.
To: ASTEC INTERNATIONAL LIMITED
Reel/Frame 070404/0863 →