Granted Patent B2

US 12,333,313 · App. 18/586,326 · Granted Jun 17, 2025

Inventors: Marshall Charles Capps (Austin, TX); Anuroop Suresh Jesu (Sunnyvale, CA)

Assignee: MAGIC LEAP, INC.

G06F9/4401G02B27/0172G06T1/20G06T3/4007G06T9/00G06T13/80G06T19/006

Abstract

Claims (64)

1. A system comprising:

one or more hardware computer processors; and

one or more non-transitory computer readable storage devices storing software instructions that, when executed by the one or more hardware computer processors, cause the system to:

load an image file into a display buffer;

determine a boot-up stage of the system;

select one of a plurality of sets of gamma table values associated with the boot-up stage, wherein each of the plurality of sets of gamma table values is associated with one of a plurality of boot-up stages including a minimum boot-up stage, a maximum boot-up stage, and at least one boot-up stage between the minimum boot-up stage and the maximum boot-up stage; and

write the one of the plurality of sets of gamma table values to gamma table storage associated with the display buffer, wherein the system is configured to render, on a display of the system, the image file as adjusted by the gamma table values in the gamma table storage.

2. The system of claim 1 , wherein the plurality of sets of gamma table values includes at least 10 sets of gamma table values associated with a corresponding at least 10 boot-up stages.

3. The system of claim 1 , wherein the image file includes:

a first set of pixels associated with a static image, each of the first set of pixels having pixel values in a first range, and

a second set of pixels associated with a progress bar, each of the second set of pixels having pixel values in a second range that does not overlap with the first range.

4. The system of claim 3 , wherein the first range is 0-63 and the second range is 64-255.

5. The system of claim 3 , wherein the gamma table values associated with the first range of pixel values are same for each boot-up stage, and the gamma table values associated with at least some pixel values of the second range of pixel values change for corresponding boot-up stages.

6. The system of claim 3 , wherein the gamma table values associated with the first range of pixel values are same in each of the plurality of sets of gamma table values, and the gamma table values associated with at least some pixel values of the second range of pixel values change in different sets of the gamma table values.

7. A system comprising:

one or more hardware computer processors; and

one or more non-transitory computer readable storage devices storing software instructions that, when executed by the one or more hardware computer processors, cause the system to:

for each pixel value of a static image, interpolate the pixel value to a first range of values to generate first interpolated pixel values;

for each of a plurality of stages of a boot-up process:

determine pixel values corresponding to an image depicting the stage of the boot-up process;

for each of the pixel values, threshold the pixel value, to one bit to generate thresholded pixel values;

select an encoded multiplier of a plurality of encoded multipliers that is associated with the stage of the boot-up process, wherein each of the plurality of encoded multipliers is within a second range of values that is non-overlapping with the first range of values;

multiply each of the thresholded pixel values by the encoded multiplier to calculate encoded pixel values for the stage of the boot-up process;

sequentially overlay the encoded pixel values for the plurality of stages of the boot-up process to generate first composite encoded pixel values; and

generate an image file including the first interpolated pixel values associated with the static image and the first composite encoded pixel values associated with stages of the boot-up process.

8. The system of claim 7 , wherein the instructions, when executed by the one or more hardware computer processors, cause the system to:

for each pixel value of a second static image, interpolate the pixel value to the first range of values to generate second interpolated pixel values;

for each stage of the plurality of stages of the boot-up process:

determine pixel values corresponding to a second image of a plurality of images depicting the stage of the boot-up process;

for each of the pixel values, threshold the pixel value to one bit, to generate thresholded pixel values;

select an encoded multiplier of the plurality of encoded multipliers that is associated with the stage of the boot-up process, wherein each of the plurality of encoded multipliers is within the second range of values that is non-overlapping with the first range of values;

multiply each of the thresholded pixel values by the encoded multiplier to calculate second encoded pixel values for the stage of the boot-up process; and

sequentially overlay the second encoded pixel values for the plurality of stages of the boot-up process to generate second composite encoded pixel values,

wherein the image file further includes the second interpolated pixel values associated with the second static image and the second composite encoded pixel values associated with stages of the boot-up process.

9. The system of claim 8 , wherein the first interpolated pixel values and the first composite encoded pixel values are configured for rendering on a left portion of a display and the second interpolated pixel values and the second composite encoded pixel values are configured for rendering on a right portion of the display.

10. The system of claim 7 , wherein the thresholded pixel values are each either zero or one.

11. The system of claim 7 , wherein the instructions, when executed by the one or more hardware computer processors, cause the system to:

for each of the stages of the boot-up process, generate one or more gamma table values associated with a corresponding one or more encoded pixel values for that stage of the boot-up process.

12. The system of claim 7 , wherein the instructions, when executed by the one or more hardware computer processors, cause the system to:

generate gamma table values associated with the first interpolated pixel values, wherein the gamma table values are usable to determine pixel values of the static image prior to interpolating the pixel values.

13. The system of claim 11 , wherein the instructions, when executed by the one or more hardware computer processors, cause the system to:

load the image file into a display buffer;

periodically determine a current stage of a boot-up process;

select gamma table values associated with the current stage; and

store the gamma table values to gamma table storage associated with a display, wherein the display is configured to render the image file as adjusted by the gamma table values to render a boot-up image.

14. A system comprising:

one or more hardware computer processors; and

one or more non-transitory computer readable storage devices storing software instructions that, when executed by the one or more hardware computer processors, cause the system to:

load an image file;

render the image file on a display of the system;

while the image file is rendered on the display of the system:

obtain system properties;

determine whether the system properties have changed from a previous boot-up process; and

if the system properties have changed, apply one or more geometric transformations to the image file to generate an adjusted image file and storing the adjusted image file for use by a next boot-up process.

15. The system of claim 14 , wherein the system properties include one or more of extrinsic or intrinsic properties of the system.

16. A system comprising:

one or more hardware computer processors; and

one or more non-transitory computer readable storage devices storing software instructions that, when executed by the one or more hardware computer processors, cause the system to:

access memory configured to store a boot image file;

determine that the accessed memory does not include a current boot image file;

in response to determining that the accessed memory does not include the current boot image file, generate, by a graphics pipeline, the boot image file at least partially concurrent to execution of a boot-up process; and

turn, by the graphics pipeline, a three-dimensional scene in an application into a video or image file that is displayed on a display of the system.

17. The system of claim 16 , wherein the accessed memory is determined to not include the current boot image file if the accessed memory does not include an image file.

18. The system of claim 16 , wherein the accessed memory is determined to not include the current boot image file if the accessed memory includes an old version image file.

Assignments (4)

Continuity (3)

References Cited (57)