Connecting Quantum Processor Chips in a Modular Quantum Processing Unit
In a general aspect, a modular quantum processing unit (QPU) includes quantum processor chips inter-connected by a cap structure. In some cases, a modular quantum processing unit includes a tunable-frequency coupler device, a first quantum processor chip, a second quantum processor chip, and a cap structure. The tunable-frequency coupler device includes a superconducting quantum interference device (SQUID) loop, a shunt capacitor, and a flux bias control line that controls a magnetic flux through the SQUID loop. The first quantum processor chip includes a first qubit device, the SQUID loop, the flux bias control line, and a first capacitive coupler device galvanically connected between the first qubit device and the tunable-frequency coupler device. The second quantum processor chip includes a second qubit device. The cap structure, which includes a microwave transmission line capacitively coupled between the tunable-frequency coupler device and the second qubit device, is bonded to the first and second quantum processor chips.
1 . A modular quantum processing unit comprising:
a tunable-frequency coupler device comprising a superconducting quantum interference device (SQUID) loop, a shunt capacitor, and a flux bias control line;
a first quantum processor chip comprising:
a first qubit device;
the SQUID loop;
the flux bias control line that controls a magnetic flux through the SQUID loop; and
a first capacitive coupler device galvanically connected between the first qubit device and the tunable-frequency coupler device;
a second quantum processor chip comprising a second qubit device;
a cap structure bonded to at least one of the first quantum processor chip or the second quantum processor chip, the cap structure comprising a microwave transmission line that is capacitively coupled between the tunable-frequency coupler device and the second qubit device.
2 . The modular quantum processing unit of claim 1 , wherein the second quantum processor chip further comprises a second capacitive coupler device galvanically connected to the second qubit device, and the microwave transmission line comprises:
a first galvanic connection to the tunable-frequency coupler device; and
a second galvanic connection to the second capacitive coupler device.
3 . The modular quantum processing unit of claim 2 , wherein:
the first galvanic connection comprises a first bonding bump between the cap structure and the first quantum processor chip; and
the second galvanic connection comprises a second bonding bump between the cap structure and the second quantum processor chip.
4 . The modular quantum processing unit of claim 1 , wherein the cap structure is bonded to the first quantum processor chip and the second quantum processor chip.
5 . The modular quantum processing unit of claim 1 , wherein the microwave transmission line comprises:
a galvanic connection to the tunable-frequency coupler device; and
at least part of a capacitive connection to the second qubit device.
6 . The modular quantum processing unit of claim 5 , wherein:
the galvanic connection comprises a bonding bump between the cap structure and the first quantum processor chip; and
the capacitive connection comprises a first capacitor electrode on the cap structure and a second capacitor electrode on the second quantum processor chip.
7 . The modular quantum processing unit of claim 1 , wherein the microwave transmission line comprises:
at least part of a first capacitive connection to the tunable-frequency coupler device; and
at least part of a second capacitive connection to the second qubit device.
8 . The modular quantum processing unit of claim 7 , wherein:
the first capacitive connection comprises a first capacitor electrode on the cap structure and a second capacitor electrode on the first quantum processor chip; and
the second capacitive connection comprises a third capacitor electrode on the cap structure and a fourth capacitor electrode on the second quantum processor chip.
9 . The modular quantum processing unit of claim 1 , wherein the first quantum processor chip comprises a plurality of first qubit devices, the second quantum processor chip comprises a plurality of second qubit devices, and the microwave transmission line of the cap structure is configured to selectively couple at least a subset of the plurality of first qubit devices and at least a subset of the plurality of second qubit devices.
10 . The modular quantum processing unit of claim 1 , wherein the second quantum processor chip further comprises a second capacitive coupler device galvanically connected to the second qubit device, and the microwave transmission line comprises:
at least part of a capacitive connection to the tunable-frequency coupler device; and
a galvanic connection to the second capacitive coupler device.
11 - 24 . (canceled)
25 . A computing method comprising:
storing information in a first qubit device on a first quantum processor chip and a second qubit device on a second quantum processor chip in a modular quantum processing unit, wherein the modular quantum processing unit comprises:
a tunable-frequency coupler device comprising a superconducting quantum interference device (SQUID) loop, a shunt capacitor, and a flux bias control line;
the first quantum processor chip, which comprises:
the SQUID loop;
the flux bias control line that controls a magnetic flux through the SQUID loop; and
a first capacitive coupler device galvanically connected between the first qubit device and the tunable-frequency coupler device; and
a cap structure bonded to at least one of the first quantum processor chip or the second quantum processor chip, the cap structure comprising a microwave transmission line that is capacitively coupled between the tunable-frequency coupler device and the second qubit device; and
processing the information by operation of the modular quantum processing unit, wherein processing the information comprises operating the tunable-frequency coupler device to selectively couple the first qubit device with the second qubit device.
26 . The computing method of claim 25 , wherein the second quantum processor chip further comprises a second capacitive coupler device galvanically connected to the second qubit device, and the microwave transmission line comprises:
a first galvanic connection to the tunable-frequency coupler device; and
a second galvanic connection to the second capacitive coupler device.
27 . The computing method of claim 26 , wherein:
the first galvanic connection comprises a first bonding bump between the cap structure and the first quantum processor chip; and
the second galvanic connection comprises a second bonding bump between the cap structure and the second quantum processor chip.
28 . The computing method of claim 25 , wherein the cap structure is bonded to the first quantum processor chip and the second quantum processor chip.
29 . The computing method of claim 25 , wherein the microwave transmission line comprises:
a galvanic connection to the tunable-frequency coupler device; and
at least part of a capacitive connection to the second qubit device.
30 . The computing method of claim 29 , wherein:
the galvanic connection comprises a bonding bump between the cap structure and the first quantum processor chip; and
the capacitive connection comprises a first capacitor electrode on the cap structure and a second capacitor electrode on the second quantum processor chip.
31 . The computing method of claim 25 , wherein the microwave transmission line comprises:
at least part of a first capacitive connection to the tunable-frequency coupler device; and
at least part of a second capacitive connection to the second qubit device.
32 . The computing method of claim 31 , wherein:
the first capacitive connection comprises a first capacitor electrode on the cap structure and a second capacitor electrode on the first quantum processor chip; and
the second capacitive connection comprises a third capacitor electrode on the cap structure and a fourth capacitor electrode on the second quantum processor chip.
33 . The computing method of claim 25 , wherein the first quantum processor chip comprises a plurality of first qubit devices, the second quantum processor chip comprises a plurality of second qubit devices, and the microwave transmission line is configured to selectively couple at least a subset of the plurality of first qubit devices and at least a subset of the plurality of second qubit devices.
34 . The computing method of claim 25 , wherein the second quantum processor chip further comprises a second capacitive coupler device galvanically connected to the second qubit device, and the microwave transmission line comprises:
at least part of a capacitive connection to the tunable-frequency coupler device; and
a galvanic connection to the second capacitive coupler device.
35 - 43 . (canceled)