MODULAR ACCESS POINT

1 . A device comprising:

a housing;

a modular baseband card (BBC) mounted within the housing, wherein the modular BBC has one or more interfaces;

one or more radio modules, wherein at least one radio module in the one or more radio modules is coupled to an interface in the one or more interfaces, wherein the one or more interfaces are capable of connecting to multiple different power classes of radio modules; and

one or more additional components in communication with the modular BBC through the one or more interfaces that support operation of a radio module in a respective power class.

2 . The device of claim 1 , wherein the at least one radio module in the different power classes of radio modules is a high-power radio module.

3 . The device of claim 2 , wherein the different power classes of radio modules comprise two or more radios of different power classes.

4 . The device of claim 1 , wherein the at least one radio module in the different power classes of radio modules is a medium-power radio module, wherein the medium-power radio module is connected to a power pallet.

5 . The device of claim 1 , wherein a duplexer is connected to the radio module through at least one of:

a direct connection; and

a cable connection.

6 . The device of claim 1 , wherein at least one interface in the one or more interfaces comprises a serial peripheral interface (SPI) comprising:

a controller;

one or more x-to-y line decoders coupled to the controller by a plurality of binary signal lines and a chip-select line, wherein the x-to-y line decoder has a plurality of chip-select outputs, where each chip-select output is associated with a different combination of binary signals transmitted by the controller on the plurality of binary signal lines; and

a plurality of SPI devices, each SPI device coupled to the controller by a plurality of lines and to an associated chip-select output of the x-to-y line decoder, wherein an SPI device in the plurality of SPI devices receives a chip-select signal through the associated chip-select output when the x-to-y line decoder receives a combination of binary signals associated with the associated chip-select output.

7 . The device of claim 6 , wherein the one or more x-to-y line decoders comprises a plurality of x-to-y line decoders, wherein each x-to-y line decoder comprises activating logic, wherein the activating logic is coupled to the controller through a plurality of x-to-y line select lines, wherein the x-to-y line select lines are coupled to the controller, and the activating logic activates the x-to-y line decoder for receiving the chip-select signals and the binary signals based on x-to-y line select signals transmitted by the controller.

8 . The device of claim 6 , wherein the controller communicates with the plurality of SPI devices through self-addressing circuitry.

9 . The device of claim 8 , wherein the plurality of SPI devices are connected through a cascaded connection and the plurality of SPI devices comprise additional self-addressing circuitry and the plurality of SPI devices have similar circuitry.

10 . The device of claim 1 , wherein multiple radio modules in the one or more radio modules are arranged in a power lineup connected to the interface in the one or more interfaces, wherein a lower-power radio module functions as a driver stage for a higher-power radio module.

11 . The device of claim 10 , wherein a digital predistortion (DPD) path extends through the multiple radio modules in the power lineup.

12 . The device of claim 11 , wherein the radio module in the power lineup comprises a DPD switch that switches the DPD path from amplified signals in the radio module and other amplified signals from at least one of the higher-power radio module and a power pallet in the power lineup.

13 . The device of claim 1 , wherein a component in the one or more additional components is a data and power entry module.

14 . The device of claim 13 , wherein the interface allows a plurality of different device types to couple in a plurality of different orientations with respect to the modular BBC.

15 . The device of claim 1 , wherein pins of the interface are reconfigurable within the BBC.

16 . The device of claim 15 , wherein the pins are reconfigurable by changing at least one of:

assembly configurations;

FPGA configurations; and

software changes.

17 . The device of claim 1 , wherein at least one amplifier in the radio module uses reflective splitting when amplifying multiple frequency bands.

18 . The device of claim 1 , further comprising a duplexer mounted to an external surface of the housing.

19 . The device of claim 1 , wherein the modular BBC comprises an FPGA, and at least one of the radio module in the one or more radio modules and the modular BBC comprises at least one transceiver chip, wherein the FPGA and the at least one transceiver chip each perform a portion of signal processing performed by the device, and wherein, the interface in the one or more interfaces is an analog RF or analog IF interface.

20 . A distributed antenna system (DAS) comprising:

one or more main units configured to communicate with one or more base stations; and

a plurality of access points coupled to the one or more main units, wherein the plurality of access points are configured to wirelessly transmit and receive signals from user equipment;

wherein at least one of the one or more main units and the plurality of access points further comprises:

a modular baseband card (BBC), wherein the modular baseband card has a plurality of interfaces;

a data and power entry module coupled to an interface of the modular BBC wherein the modular BBC receives baseband data signals and power through the data and power entry module; and

one or more cascaded radio modules, wherein a radio module in a cascaded radio module is coupled to an other interface in the plurality of interfaces, wherein the plurality of interfaces is capable of connecting to multiple different types of radio modules.

21 . The DAS of claim 20 , wherein the interface in the plurality of interfaces comprises a self-addressing serial peripheral interface (SPI) comprising:

a controller mounted on the modular BBC;

one or more x-to-y line decoders coupled to the controller by a plurality of binary signal lines and a chip-select line, wherein the x-to-y line decoder has a plurality of chip-select outputs, wherein each chip-select output is associated with a different combination of binary signals transmitted by the controller on the plurality of binary signal lines;

a plurality of SPI devices, each SPI device coupled to the controller by a plurality of lines and to an associated chip-select output of the x-to-y line decoder, wherein an SPI device in the plurality of SPI devices receives a chip-select signal through the associated chip-select output when the x-to-y line decoder receives a combination of binary signals associated with the associated chip-select output; and

self-addressing circuitry, wherein the self-addressing circuitry controls selections of SPI devices in the plurality of SPI devices based on one or more interfaces in the plurality of interfaces through which the device communicates with the controller.

22 . The DAS of claim 21 , wherein the one or more x-to-y line decoders comprises a plurality of x-to-y line decoders, wherein each x-to-y line decoder comprises activating logic, wherein the activating logic is coupled to the controller through a plurality of x-to-y line select lines, wherein the x-to-y line select lines are coupled to the controller, and the activating logic activates the x-to-y line decoder for receiving the chip-select signals and the binary signals based on x-to-y line select signals transmitted by the controller.

23 . The DAS of claim 22 , wherein the self-addressing circuitry for an interface in the one or more interfaces connected to a connected device comprises at least one of:

an activation open connection that couples to an input line for the activating logic of the connected device;

a binary-signal open connection that couples to a binary signal line of the connected device;

an activation ground connection that couples to the input line for the activating logic of the connected device; and

a binary-signal ground connection that couples to the binary signal line of the connected device.

24 . The DAS of claim 22 , wherein the plurality of SPI devices are connected through a cascaded connection and the plurality of SPI devices comprise additional self-addressing circuitry and the plurality of SPI devices have similar circuitry.

25 . The DAS of claim 20 , wherein at least one amplifier in the radio module uses reflective combining when amplifying multiple frequency bands.

26 . The DAS of claim 20 , further comprising a duplexer mounted to an external surface of a housing of an access point in the one or more access points.

27 . A method comprising:

exchanging a baseband signal by a modular baseband card (BBC) having a plurality of reconfigurable interfaces through a data and power entry module coupled to the modular BBC;

exchanging signals between the modular BBC and one or more radio modules coupled to at least one reconfigurable interface in the plurality of reconfigurable interfaces; and

converting the signals for radio frequency transmission and reception within the one or more radio modules, wherein the radio module amplifies downlink signals to a desired power level for transmission into a coverage area.

28 . The method of claim 27 , wherein multiple radio modules in the one or more radio modules are arranged in a power lineup connected to the interface in the plurality of reconfigurable interfaces, wherein a low-power radio module functions as a first driver stage for a medium-power radio module and the medium-power radio module functions as a second driver stage for a power pallet.

29 . The method of claim 28 , wherein a digital predistortion (DPD) path extends through the multiple radio modules in the power lineup, wherein a radio module in the power lineup comprises a DPD switch that switches the DPD path from amplified signals in the radio module and other amplified signals from at least one of a higher-power radio module and the power pallet in the power lineup.

30 . The method of claim 27 , further comprising using reflective splitting when amplifying multiple frequency bands.

31 . The method of claim 27 , further comprising distributing performance of one or more signal processing operations performed by an FPGA on the modular BBC to at least one transceiver chip located on the one or more radio modules.

32 . The method of claim 27 , further comprising coupling a plurality of different devices types in a plurality of different orientations through multiple interfaces in the plurality of reconfigurable interfaces.

33 . The method of claim 27 , further comprising reconfiguring one or more pins of the at least one reconfigurable interface by changing at least one of:

assembly configurations;

FPGA configurations; and

software changes.

34 . The method of claim 27 , further comprising using reflective splitting to amplify multiple frequency bands in the one or more radio modules.