IP Library Granted Patent US 12,669,379
Granted Patent B2
US 12,669,379 · App. 18/613,764 · Granted Jun 30, 2026

Delay-free temperature measurement of power switches

Inventor: Fadi Rifai (Munich, DE)
Assignee: SCHAEFFLER TECHNOLOGIES AG & CO. KG
G01J5/0096G01J5/048H10W70/40H10W72/652H10W90/767
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Quick Facts
Patent No.
US 12,669,379
App. No.
18/613,764
Granted
Jun 30, 2026
Kind
B2
Abstract

A temperature measurement and a method for measuring the temperature of a semiconductor substrate, or semiconductor substrate, of a power switch assembly, which is delay free. The power switch assembly includes a circuit and a printed circuit board (PCB), where the circuit is mounted to the PCB. A lead frame is part of the circuit, at least one semiconductor substrate is part of the circuit and mounted to the lead frame, and a sensor is part of the circuit and mounted to the lead frame. A chamber is located between the sensor and the semiconductor substrate, such that the chamber galvanically isolates the sensor from the semiconductor substrate. The sensor detects the temperature of the semiconductor substrate.

Claims (32)

1 . A power switch assembly, comprising:

a circuit;

a printed circuit board, the circuit mounted to the PCB;

a lead frame being part of the circuit;

at least one semiconductor substrate being part of the circuit, and mounted to the lead frame;

a sensor being part of the circuit, and mounted to the lead frame; and

a chamber located between the sensor and the at least one semiconductor substrate, such that the chamber galvanically isolates the sensor from the at least one semiconductor substrate and the lead frame;

wherein the sensor is configured for detecting the temperature of the at least one semiconductor substrate.

2 . The power switch assembly according to claim 1 , the sensor further comprising an infrared sensor.

3 . The power switch assembly according to claim 2 , wherein the circuit is one selected from the group consisting of a MOSFET, IGBT, and TRIAC.

4 . The power switch assembly according to claim 2 , further comprising:

a housing mounted to the PCB on the opposite side of the PCB relative to the circuit;

wherein the housing transfers heat away from the PCB and the circuit.

5 . The power switch assembly according to claim 2 , further comprising a copper layer, wherein a portion of the copper layer is mounted to the at least one semiconductor substrate and another portion of the copper layer is mounted to the lead frame.

6 . The power switch assembly according to claim 2 , the chamber being one selected from the group consisting of a cavity and a transparent plastic material.

7 . The power switch assembly according to claim 1 , wherein the circuit is one selected from the group consisting of a MOSFET, IGBT, and TRIAC.

8 . The power switch assembly according to claim 1 , further comprising:

a housing mounted to the PCB on the opposite side of the PCB relative to the circuit;

wherein the housing transfers heat away from the PCB and the circuit.

9 . The power switch assembly according to claim 8 , further comprising a copper layer, wherein a portion of the copper layer is mounted to the at least one semiconductor substrate and another portion of the copper layer is mounted to the lead frame.

10 . The power switch assembly according to claim 8 , the chamber being one selected from the group consisting of a cavity and a transparent plastic material.

11 . The power switch assembly according to claim 1 , further comprising a copper layer, wherein a portion of the copper layer is mounted to the at least one semiconductor substrate and another portion of the copper layer is mounted to the lead frame.

12 . The power switch assembly according to claim 1 , the chamber being one selected from the group consisting of a cavity and a transparent plastic material.

13 . A method for detecting the temperature of a circuit, of the method comprising:

providing a lead frame;

providing at least one semiconductor substrate mounted to the lead frame;

providing a sensor mounted to the lead frame; and

providing a chamber located between the sensor and the at least one semiconductor substrate;

galvanically isolating the sensor from the at least one semiconductor substrate using the chamber; and

detecting the temperature of the at least one semiconductor substrate using the sensor.

14 . The method according to claim 13 , the sensor further comprising an infrared sensor.

15 . The method of claim 13 , the circuit being one selected from the group consisting of a MOSFET, IGBT, and TRIAC.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2025
From: VITESCO TECHNOLOGIES GMBH
To: SCHAEFFLER TECHNOLOGIES AG & CO. KG
Reel/Frame 072774/0843 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ENTITY TYPE PREVIOUSLY RECORDED AT REEL: 68393 FRAME: 554. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Feb 27, 2025
From: RIFAI, FADI
To: VITESCO TECHNOLOGIES GMBH
Reel/Frame 070564/0858 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2024
From: RIFAI, FADI
To: VITESCO TECHNOLOGIES GBMH
Reel/Frame 068393/0554 →
Priority Claims (1)
DE 10 2023 202 701.1 · Mar 24, 2023 · national
Continuity (1)
Related Publication 20240319012A1 · Sep 26, 2024
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