IP Library Patent Application 18615060
Patent Application
App. No. 18/615,060

SYSTEMS AND METHODS FOR SCALABLE VIDEO CODING FOR MACHINES

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Quick Facts
Patent No.
US None
App. No.
18/615,060
Abstract

Systems and methods for scalable video coding for machines is provided. In an aspect, a decoder is provided which includes circuitry configured to receive a bitstream, the bitstream including at least a header, at least a base feature layer, and at least a residual visual layer. The decoder is configured to decode the at least a base feature layer, decode the at least a residual visual layer, combine the at least a decoded base feature layer with the at least a residual visual layer, and output a human-viewable video as a function of the combined at least a decoded base feature layer and the at least a residual visual layer.

Claims (34)

1 . A decoder, the decoder comprising circuitry configured to:

receive a bitstream, the bitstream including at least a header, at least a base feature layer, and at least a residual visual layer;

decode the at least a base feature layer;

decode the at least a residual visual layer;

combine the at least a decoded base feature layer with the at least a residual visual layer; and

output a human-viewable video as a function of the combined at least a decoded base feature layer and the at least a residual visual layer.

2 . The decoder of claim 1 , wherein decoding the at least a base feature layer further comprises inversely pre-processing the at least a decoded base feature layer.

3 . The decoder of claim 2 , wherein the at least a header includes at least a pre-processing parameter; and

decoding the at least a base feature layer further comprises inversely pre-processing the at least a decoded base feature layer as a function of the at least a pre-processing parameter.

4 . The decoder of claim 1 , wherein the at least a residual visual layer comprises a first residual visual layer and a second residual visual layer.

5 . The decoder of claim 4 , wherein a number of residual visual layers is signaled within the at least a header.

6 . The decoder of claim 5 , wherein the circuitry is further configured to combine the at least a decoded base feature later with the first residual visual layer; and

combine the at least a combined decoded base feature and first residual visual layer with the second residual visual layer.

7 . The decoder of claim 1 , wherein the circuitry is further configured to output the at least a decoded base feature layer to at least a machine.

8 . The decoder of claim 7 , wherein the circuitry is further configured to output at least a feature parameter, signaled in the at least a header, to the at least a machine.

9 . The decoder of claim 7 , wherein the circuitry is further configured to inversely pre-process the at least a decoded base feature layer.

10 . The decoder of claim 1 , wherein the circuitry is further configured to parse the bitstream into the at least a header, at least a base feature layer, and at least a residual visual layer.

11 . A method of decoding, using a decoder comprising circuitry, the method comprising:

receiving a bitstream, using the circuitry, the bitstream including at least a header, at least a base feature layer, and at least a residual visual layer;

decoding, using the circuitry, the at least a base feature layer;

decoding, using the circuitry, the at least a residual visual layer;

combining, using the circuitry, the at least a decoded base feature layer with the at least a residual visual layer; and

outputting, using the circuitry, a human-viewable video as a function of the combined at least a decoded base feature layer and the at least a residual visual layer.

12 . The method of claim 11 , wherein decoding the at least a base feature layer further comprises inversely pre-processing, using the circuitry, the at least a decoded base feature layer.

13 . The method of claim 12 , wherein the at least a header includes at least a pre-processing parameter; and

decoding the at least a base feature layer further comprises inversely pre-processing the at least a decoded base feature layer as a function of the at least a pre-processing parameter.

14 . The method of claim 11 , wherein the at least a residual visual layer comprises a first residual visual layer and a second residual visual layer.

15 . The method of claim 14 , wherein a number of residual visual layers is signaled within the at least a header.

16 . The method of claim 15 , further comprising combining, using the circuitry, the at least a decoded base feature later with the first residual visual layer; and

combining, using the circuitry, the at least a combined decoded base feature and first residual visual layer with the second residual visual layer.

17 . The method of claim 11 , further comprising outputting, using the circuitry, the at least a decoded base feature layer to at least a machine.

18 . The method of claim 17 , further comprising outputting, using the circuitry, at least a feature parameter, signaled in the at least a header, to the at least a machine.

19 . The decoder of claim 7 , further comprising inversely pre-processing, using the circuitry, the at least a decoded base feature layer.

20 . The decoder of claim 1 , further comprising parsing, using the circuitry, the bitstream into the at least a header, the at least a base feature layer, and the at least a residual visual layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2025
From: FURHT, BORIVOJE; KALVA, HARI
To: FLORIDA ATLANTIC UNIVERSITY RESEARCH CORPORATION
Reel/Frame 073482/0048 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2025
From: FLORIDA ATLANTIC UNIVERSITY RESEARCH CORPORATION
To: OP SOLUTIONS, LLC
Reel/Frame 073482/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2025
From: ADZIC, VELIBOR
To: OP SOLUTIONS, LLC
Reel/Frame 073482/0944 →