IP Library Granted Patent US 12,438,538
Granted Patent B2
US 12,438,538 · App. 18/616,703 · Granted Oct 7, 2025

Motor driver circuit

Inventors: Suzunosuke Kimura (Kyoto, JP); Kosuke Yasuji (Kyoto, JP); Hiroki Sugamoto (Kyoto, JP)
Assignee: ROHM CO., LTD.
H03K17/302H02M3/07H03K17/04106H03K2217/0063H03K2217/0072
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Quick Facts
Patent No.
US 12,438,538
App. No.
18/616,703
Granted
Oct 7, 2025
Kind
B2
Abstract

The present disclosure provides a motor driver circuit. The motor driver circuit includes a high-side driver that drives a high-side transistor according to a control signal. The high-side driver includes a voltage monitoring circuit, a timer circuit and a charge pump circuit. The voltage monitoring circuit asserts a detection signal when a detection voltage of the high-side transistor becomes lower than a threshold value. The timer circuit starts measuring a predetermined time in response to the control signal changing to an on state that the high side transistor is instructed to turn on, or in response to an assertion of the detection signal when the control signal is in the on state. The charge pump circuit is active while the timer circuit measures the predetermined time, generates a boosted voltage in response to a clock signal and supplies the boosted voltage to a gate of the high-side transistor.

Claims (29)

1. A motor driver circuit, comprising:

a logic circuit, configured to generate a control signal that instructs a high-side transistor to turn on or off; and

a high-side driver, configured to drive the high-side transistor according to the control signal, wherein

the high-side driver includes:

a voltage monitoring circuit, configured to

compare a detection voltage with a threshold value, wherein the detection voltage is a gate voltage or a gate-source voltage of the high-side transistor, and

assert a detection signal when the detection voltage becomes lower than the threshold value;

a timer circuit, configured to start measuring a predetermined time in response to the control signal changing to an on state that the high side transistor is instructed to turn on, or in response to assertion of the detection signal when the control signal is in the on state;

a charge pump circuit, configured to

be active when the timer circuit measures the predetermined time,

generate a boosted voltage in response to a clock signal, and

supply the boosted voltage to a gate of the high-side transistor; and

a turn-off circuit, configured to reduce a voltage at the gate of the high-side transistor when the control signal instructs the high-side transistor to turn off.

2. The motor driver circuit of claim 1 , further comprising:

an oscillator, configured to generate the clock signal; and

a first switch, connected between an output node of the oscillator and a clock input node of the charge pump circuit, wherein

the first switch is controlled by an output of the timer circuit.

3. The motor driver circuit of claim 2 , wherein the turn-off circuit includes a second switch connected between the gate of the high-side transistor and a ground, or between the gate and a source of the high-side transistor.

4. The motor driver circuit of claim 2 , wherein

the charge pump circuit includes a reference input node and is configured to be outputtable a voltage greater than the voltage supplied to the reference input node by a predetermined voltage in response to the clock signal,

the motor driver circuit further comprises a third switch connected between the reference input node of the charge pump circuit and a drain of the high-side transistor,

the third switch is turned on when the control signal changes to the on state, and after a delay, the timer circuit is configured to start measuring the predetermined time.

5. The motor driver circuit of claim 2 , wherein the motor driver circuit is integrated on one semiconductor substrate.

6. The motor driver circuit of claim 1 , wherein the turn-off circuit includes a second switch connected between the gate of the high-side transistor and a ground, or between the gate and a source of the high-side transistor.

7. The motor driver circuit of claim 1 , wherein

the charge pump circuit includes a reference input node and is configured to be outputtable a voltage greater than the voltage supplied to the reference input node by a predetermined voltage in response to the clock signal,

the motor driver circuit further comprises a third switch connected between the reference input node of the charge pump circuit and a drain of the high-side transistor,

the third switch is turned on when the control signal changes to the on state, and after a delay, the timer circuit is configured to start measuring the predetermined time.

8. The motor driver circuit of claim 1 , wherein the motor driver circuit is integrated on one semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2024
From: KIMURA, SUZUNOSUKE; YASUJI, KOSUKE; SUGAMOTO, HIROKI
To: ROHM CO., LTD.
Reel/Frame 066901/0533 →
Priority Claims (1)
JP 2023-052366 · Mar 28, 2023 · national
Continuity (1)
Related Publication 20240333280A1 · Oct 3, 2024
References Cited (2)
US 20240333284A1 · Yasuji · 2024 [cited by examiner]
JP 6208504B2 · 2017 [cited by applicant]