MEMORY CELL BASED ON A PHASE-CHANGE MATERIAL
A memory cell comprising a stack of a conductive via, of a layer made of a phase-change material, and of a first electrode, the memory cell being covered with an encapsulation layer made of a silicon nitride having a density or volumic mass smaller than 2.2 g/cm 3 . A method of manufacturing a memory cell and a system having an integrated memory circuit that includes a plurality of memory cells is also provided.
1 . A memory cell comprising:
a stack of layers;
a conductive via coupled to the stack;
a layer made of a phase-change material;
a first electrode; and
an encapsulation layer made of a silicon nitride having a density smaller than 2.2 g/cm 3 .
2 . The memory cell according to claim 1 , wherein the encapsulation layer covers sides of the layer made of the phase-change material and of the first electrode.
3 . The memory cell according to claim 1 , wherein the encapsulation layer has a density smaller than 2.15 g/cm 3 .
4 . The memory cell according to claim 1 , wherein the phase-change material is a chalcogenide.
5 . The memory cell according to claim 4 , wherein the phase-change material is an alloy of germanium, antimony, and tellurium.
6 . The memory cell according to claim 1 , further comprising, between the layer made of the phase-change material and the first electrode, a heating element surrounded with an insulating layer.
7 . The memory cell according to claim 1 , wherein the encapsulation layer has a thickness in the range from 5 nm to 80 nm.
8 . A method of manufacturing a memory cell comprising:
forming a conductive via couled to a stack of layers;
forming a layer of a phase-change material, and of a first electrode; and
forming an encapsulation layer made of a silicon nitride having a density smaller than 2.2 g/cm 3 .
9 . The method according to claim 8 , wherein the deposition of the encapsulation layer is performed by pulsed plasma enhanced chemical vapor deposition.
10 . A device, comprising:
an integrated memory circuit that includes:
a plurality of memory cells, wherein each memory cell includes a stack layers and a conductive via coupled to the stack of layers, the stack of layers including:
a layer made of a phase-change material;
a first electrode; and
an encapsulation layer made of a silicon nitride having a density smaller than 2.2 g/cm 3 .
11 . The device of claim 10 , wherein the encapsulation layer covers sides of the layer made of the phase-change material and of the first electrode.
12 . The device of claim 10 , wherein the encapsulation layer has a density smaller than 2.15 g/cm 3 .
13 . The device of claim 10 , wherein the phase-change material is a chalcogenide.
14 . The device of claim 13 , wherein the phase-change material is an alloy of germanium, antimony, and tellurium.
15 . The device of claim 10 , further comprising, between the layer made of the phase-change material and the first electrode, a heating element surrounded with an insulating layer.
16 . The device of claim 10 , wherein the encapsulation layer has a thickness in the range from 5 nm to 80 nm.