IP Library Patent Application 18622577
Patent Application
App. No. 18/622,577

VARIABLE GATE VOLTAGE DRIVING FOR GATE DRIVE CONTROL

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
18/622,577
Abstract

A synchronous rectifier driver circuit is configured to drive a synchronous rectifier. The driver circuit drives a gate terminal of a synchronous rectifier switch with a gate drive voltage that is proportional to the current flowing through the synchronous rectifier switch, for at least a portion of the on-phase of the synchronous rectifier switch.

Claims (50)

1 . A method, comprising:

driving a rectifier switch of a synchronous rectifier with a gate drive signal in cycles including an on-phase and an off-phase;

estimating an output current of the rectifier switch during the on-phase; and

adjusting a voltage of the gate drive signal during at least a portion of the on-phase based on the output current.

2 . The method of claim 1 , wherein estimating the output current includes measuring a drain voltage of the rectifier switch, wherein adjusting the voltage of the gate drive signal includes adjusting the voltage of the gate drive signal based on the drain voltage.

3 . The method of claim 1 , comprising:

holding the voltage of the gate drive signal at a maximum value during a first portion of the on-phase; and

adjusting the voltage of the gate drive signal proportional to the output current during a second portion of the on-phase.

4 . The method of claim 3 , comprising:

generating a gate drive reference voltage based on a drain voltage of the rectifier switch;

generating a gate driver supply voltage based on the gate drive reference voltage;

receiving the driver supply voltage at a supply terminal of a gate driver;

receiving the gate drive reference voltage at an input terminal of the gate driver; and

outputting the gate drive signal from an output terminal of the gate driver.

5 . A device, comprising:

a synchronous rectifier driver circuit configured to drive a first rectifier switch and including:

a shaping circuit configured to receive a drain voltage signal indicating a voltage of a drain terminal of the rectifier switch and to generate a gate drive reference voltage;

a voltage regulator configured to receive the gate drive reference voltage and a supply voltage and to generate driver supply voltage based on the gate drive reference voltage; and

a gate driver having a first input configured to receive the gate drive reference voltage, a supply input configured to receive the driver supply voltage, and an output configured to output a gate drive signal to a gate terminal of the rectifier switch.

6 . The device of claim 5 , wherein the gate driver drives the gate terminal of the rectifier switch in cycles, wherein each cycle includes an on-phase and an off-phase, wherein the voltage regulator is configured to identify a peak value of the gate drive reference voltage in each cycle.

7 . The device of claim 5 , wherein the voltage regulator generates the gate driver supply voltage as an average of the peak value of the gate drive reference voltage over n cycles, where n is an integer greater than 1.

8 . The device of claim 7 , wherein the voltage regulator includes a node that stores the average of the peak value.

9 . The device of claim 8 , wherein the voltage regulator includes an operational amplifier including a non-inverting input coupled the average of the peak value, an output that provides the driver supply voltage, and an inverting input coupled to the output in a feedback configuration.

10 . The device of claim 8 , wherein the voltage regulator includes a storage capacitor coupled to the node and configured to store the average of the peak value.

11 . The device of claim 10 , wherein the voltage regulator includes:

an input configured to receive the reference voltage;

a first capacitor coupled to the input node; and

a first switch coupled between the first capacitor and the second capacitor.

12 . The device of claim 11 , wherein the first capacitor has a capacitance equal to a capacitance of the storage capacitor divided by n.

13 . A method, comprising:

driving, with a driver circuit of a resonant converter, a rectifier switch of the resonant converter;

receiving, with a shaping circuit of the driver circuit, a drain voltage of the rectifier switch;

generating, with the shaping circuit, a gate drive reference voltage based on the drain voltage;

generating, with a voltage regulator of the driver circuit, a driver supply voltage based on the gate drive reference voltage;

receiving the driver supply voltage at a supply voltage terminal of a gate driver of the driver circuit;

receiving the gate drive reference voltage at an input terminal of the gate driver; and

outputting a gate drive signal from the gate driver to a gate terminal of the rectifier switch.

14 . The method of claim 1 , comprising:

driving the gate terminal of the rectifier switch in cycles, wherein each cycle includes an on-phase and an off-phase; and

identifying, with the voltage regulator a peak value of the gate drive reference voltage in each cycle.

15 . The method of claim 13 , comprising generating, with the voltage regulator, the gate driver supply voltage as an average of a peak value of the gate drive reference voltage over n cycles, where n is an integer greater than 1.

16 . The method of claim 15 , comprising storing the average of the peak value at a storage node of the voltage regulator.

17 . The method of claim 16 , wherein the voltage regulator includes an operational amplifier including a non-inverting input coupled the average of the peak value, an output that provides the driver supply voltage, and an inverting input coupled to the output in a feedback configuration.

18 . The method of claim 16 , including storing the average of the peak value with a storage capacitor of the voltage regulator.

19 . The method of claim 18 , wherein the voltage regulator includes:

an input configured to receive the reference voltage;

a first capacitor coupled to the input node; and

a first switch coupled between the first capacitor and the storage capacitor.

20 . The method claim 19 , wherein the first capacitor has a capacitance equal to a capacitance of the storage capacitor divided by n.

21 - 40 . (canceled)

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2024
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 068434/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2024
From: IORIO, ALBERTO; FORESTA, MAURIZIO; VOLPI, EMILIO
To: STMICROELECTRONICS S.R.L.
Reel/Frame 067017/0642 →