IP Library Granted Patent US 12,510,586
Granted Patent B1
US 12,510,586 · App. 18/623,768 · Granted Dec 30, 2025

Quantum error-correction in microwave integrated quantum circuits

Inventors: William J. Zeng (Berkeley, CA); Eyob A. Sete (Walnut Creek, CA); Chad Tyler Rigetti (Walnut Creek, CA)
Assignee: Rigetti & Co, LLC
G01R31/2851G06N10/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,510,586
App. No.
18/623,768
Granted
Dec 30, 2025
Kind
B1
Abstract

In some implementations, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.

Claims (26)

1 . A method to perform quantum error-correction in a quantum computing system, the quantum computing system comprising a quantum processor cell comprising a device lattice, the device lattice comprising an array of lattice cells, each lattice cell comprising transmon devices defining data qubits and tunable coupler devices defining ancilla qubits, the method comprising:

identifying a two-qubit quantum logic gate to be applied to a first data qubit of the data qubits and a first ancilla qubit of the ancilla qubits;

generating, by operation of a control system associated with the quantum processor cell, a control sequence configured to apply the two-qubit quantum logic gate to the first data qubit and the first ancilla qubit, the control sequence comprising a control signal, the two-qubit quantum logic gate comprising an iSWAP gate; and

sending the control sequence to the quantum processor cell to execute the two-qubit quantum logic gate.

2 . The method of claim 1 , wherein each of the tunable coupler devices comprises:

a superconducting circuit loop; and

bias circuitry that applies a magnetic bias field to the superconducting circuit loop in response to the control signal.

3 . The method of claim 1 , wherein applying the two-qubit quantum logic gate comprises applying microwave pulses to the device lattice.

4 . The method of claim 1 , wherein the two-qubit quantum logic gate is a first two-qubit quantum logic gate, the control sequence is a first control sequence, the control signal is a first control signal, and the method comprises:

identifying a second two-qubit quantum logic gate to be applied to a second data qubit of the data qubits and a second ancilla qubit of the ancilla qubits;

generating, by operation of the control system, a second control sequence configured to apply the second two-qubit quantum logic gate, the second control sequence comprising a second control signal; and

sending the second control sequence to the quantum processor cell to execute the second two-qubit quantum logic gate.

5 . A quantum computing system comprising:

a quantum processor cell comprising a device lattice, the device lattice comprising an array of lattice cells, each lattice cell comprising transmon devices defining data qubits and tunable coupler devices defining ancilla qubits, and

a control system associated with the quantum processor cell, the control system configured to:

identify a two-qubit quantum logic gate to be applied to a first data qubit of the data qubits and a first ancilla qubit of the ancilla qubits;

generate a control sequence configured to apply the two-qubit quantum logic gate to the first data qubit and the first ancilla qubit, the control sequence comprising a control signal, and the two-qubit quantum logic gate comprising an iSWAP gate; and

send the control sequence to the quantum processor cell to execute the two-qubit quantum logic gate.

6 . The system of claim 5 , wherein each of the tunable coupler devices comprises:

a superconducting circuit loop; and

bias circuitry that applies a magnetic bias field to the superconducting circuit loop in response to the control signal.

7 . The system of claim 5 , wherein applying the two-qubit quantum logic gate comprises applying microwave pulses to the device lattice.

8 . The system of claim 5 , wherein the two-qubit quantum logic gate is a first two-qubit quantum logic gate, the control sequence is a first control sequence, the control signal is a first control signal, and the control system is further configured to:

identify a second two-qubit quantum logic gate to be applied to a second data qubit of the data qubits and a second ancilla qubit of the ancilla qubits;

generate a second control sequence configured to apply the second two-qubit quantum logic gate, the second control sequence comprising a second control signal; and

send the second control sequence to the quantum processor cell to execute the second two-qubit quantum logic gate.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC
Reel/Frame 069603/0771 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
Reel/Frame 069603/0831 →
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 8, 2024
From: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0416 →
CHANGE OF NAME Recorded Apr 12, 2024
From: RIGETTI & CO., INC.
To: RIGETTI & CO, LLC
Reel/Frame 067097/0844 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2024
From: ZENG, WILLIAM J.; SETE, EYOB A.; RIGETTI, CHAD T.
To: RIGETTI & CO., INC.
Reel/Frame 067080/0957 →
Continuity (6)
Continuation 18165272 · Feb 6, 2023
Continuation 17695980 · Mar 16, 2022
Division 17066187 · Oct 8, 2020
Continuation 16424901 · May 29, 2019
Division 15380822 · Dec 15, 2016
Provisional Application 62277256 · Jan 11, 2016
References Cited (66)
US 6900456B2 · Blais et al. · 2005 [cited by applicant]
US 7655850B1 · Ahn · 2010 [cited by applicant]
US 7932515B2 · Bunyk · 2011 [cited by applicant]
US 8642998B2 · Gambetta et al. · 2014 [cited by applicant]
US 8872360B2 · Chow et al. · 2014 [cited by applicant]
US 9317473B2 · Yao et al. · 2016 [cited by applicant]
US 10056908B2 · Rigetti et al. · 2018 [cited by applicant]
US 10352992B1 · Zeng et al. · 2019 [cited by applicant]
US 10852346B1 · Zeng et al. · 2020 [cited by applicant]
US 11307242B1 · Zeng et al. · 2022 [cited by applicant]
US 11573259B1 · Zeng et al. · 2023 [cited by applicant]
US 20040000666A1 · Lidar · 2004 [cited by examiner]
US 20040109631A1 · Franson · 2004 [cited by applicant]
US 20040119061A1 · Wu et al. · 2004 [cited by applicant]
US 20060169877A1 · Goto et al. · 2006 [cited by applicant]
US 20070194225A1 · Zorn · 2007 [cited by applicant]
US 20100079833A1 · Langford et al. · 2010 [cited by applicant]
US 20100251049A1 · Goto et al. · 2010 [cited by applicant]
US 20140025926A1 · Yao et al. · 2014 [cited by applicant]
US 20140264285A1 · Chow · 2014 [cited by applicant]
US 20150034808A1 · Yuan et al. · 2015 [cited by applicant]
US 20160125311A1 · Fuechsle · 2016 [cited by examiner]
US 20160267032A1 · Rigetti et al. · 2016 [cited by applicant]
US 20170116542A1 · Shim et al. · 2017 [cited by applicant]
US 20180285761A1 · Gambetta · 2018 [cited by examiner]
WO 2015178990A2 · 2015 [cited by applicant]
WO 2015178991 · 2015 [cited by applicant]
WO 2015178992A2 · 2015 [cited by applicant]
USPTO, Notice of Allowance issued Dec. 14, 2021, in U.S. Appl. No. 17/066,187. [cited by applicant]
United States Receiving Office, International Search Report and Written Opinion for PCT App. No. PCT/US15/67416 dated Mar. 11, 2016, 12 pages. [cited by applicant]
USPTO, Notice of Allowance issued Apr. 20, 2018, in U.S. Appl. No. 15/121,483, 15 pgs. [cited by applicant]
USPTO, Notice of Allowance issued in U.S. Appl. No. 18/165,272 on Jan. 3, 2024, 22 pages. [cited by applicant]
USPTO, Notice of Allowance mailed Jul. 24, 2020, in U.S. Appl. No. 16/424,901, 22 pgs. [cited by applicant]
USPTO, Notice of Allowance mailed Sep. 29, 2022, in U.S. Appl. No. 17/695,980, 22 pgs. [cited by applicant]
USPTO, Non-Final Office Action mailed Oct. 3, 2018, in U.S. Appl. No. 15/380,822, 32 pgs. [cited by applicant]
USPTO, Office Action in U.S. Appl. No. 15/121,483 dated Jul. 28, 2017, 36 pages. [cited by applicant]
USPTO, Restriction Requirement issued May 9, 2018, in U.S. Appl. No. 15/380,822, 5 pgs. [cited by applicant]
USPTO, Restriction Requirement mailed Aug. 18, 2021, in U.S. Appl. No. 17/066,187, 5 pgs. [cited by applicant]
Third-Party Submission Under 37 CFR 1.290 filed Aug. 21, 2017, in U.S. Appl. No. 15/121,483, 8 pages. [cited by applicant]
USPTO, Notice of Allowance mailed Feb. 27, 2019, in U.S. Appl. No. 15/380,822, 9 pgs. [cited by applicant]
Almudever, C. G. , et al., “The Engineering Challenges in Quantum Computing”, Design, Automation & Test in Europe Conference & Exhibition, 2017, pp. 836-845, 10 pages. [cited by applicant]
Blais, Alexandre , et al., “Cavity quantum electrodynamics for superconducting electrical circuits: an architecture for quantum computation”, arXiv:cond-mat/0402216v1 [cond-mat.mes-hall], Feb. 2008, 14 pages. [cited by applicant]
Bombin, Hector , “Gauge Color Codes: Optimal Transversal Gates and Gauge Fixing in Topological Stabilizer Codes”, arXiv: 1311.0879v6 [quant-ph], Aug. 6, 2015, 10 pages. [cited by applicant]
Braumuller, Jochen , “Development of tunable transmon qubit in microstrip geometry”, Karlsruhe Institute of Technology, Dec. 12, 2013, 96 pages. [cited by applicant]
Chow, J. , “Quantum Information Processing with Superconducting Qubits—Chapter 4.”, Dissertation, Yale School of Engineering and Applied Sciences, May 2010, 39 pages. [cited by applicant]
Corcoles, A. D., et al., “Demonstration of a quantum error detection code using a square lattice of four superconducting qubits, Nature Communications”, DOI: 10.1038/ncomms7979, Apr. 29, 2015, 10 pgs. [cited by applicant]
Devitt, Simon J, et al., “Programming a Topological Quantum Computer”, arXiv:1209.1441 [quant-ph], Sep. 7, 2012, 6 pages. [cited by applicant]
Dicarlo, L , et al., “Demonstration of two-qubit algorithms with a superconducting quantum processor”, Nature, vol. 460, 240, Jul. 9, 2009, 5 pages. [cited by applicant]
Egger, D. J., et al., “Optimized controlled-Z gates for two superconducting qubits coupled through a resonator”, Supercond. Sci. Technol. 27 (2014) 014001, Nov. 26, 2013, 12 pages. [cited by applicant]
Ekert, Artur , et al., “Geometric Quantum Computation”, arXiv: quant-ph/004015v1, Feb. 1, 2008, 15 pages. [cited by applicant]
Fowler, Austin G., “2D color code quantum computation”, arXiv:0806.4827v3 [quant-ph], Jan. 10, 2011, 9 pages. [cited by applicant]
Fowler, Austin G., et al., “High threshold universal quantum computation on the surface code”, arXiv:0803.0272v5, Physical Review A 80, 052312, Dec. 12, 2012, 20 pages. [cited by applicant]
Fowler, Austin G., “Surface codes: Towards practical large-scale quantum computation”, Physical Review A 86, 032324, Sep. 18, 2012, 48 pages. [cited by applicant]
Ghosh, Joydip , et al., “High-fidelity controlled-oZ gate for resonator-based superconducting quantum computers”, Physical Review A 87, 022309, Feb. 8, 2013, 19 pages. [cited by applicant]
Kubica, Aleksander , et al., “Unfolding the Color Code”, New Journal of Physics 17, 083026, Aug. 13, 2015, 26 pages. [cited by applicant]
Landahl, Andrew J., et al., “Fault-tolerant quantum computing with color codes”, arXiv:1108.5738v1 [quant-ph], Aug. 29, 2011, 28 pages. [cited by applicant]
Mckay, David C., et al., “A universal gate for fixed-frequency qubits via a tunable bus”, arXiv:1604.03076v2 [quant-ph], Aug. 18, 2016, 9 pages. [cited by applicant]
Mckay, David C., et al., “A universal gate for fixed-frequency qubits via a tunable bus”, arXiv:1604.03076v3 [quant-ph], Dec. 19, 2016, 12 pages. [cited by applicant]
Naik, R. K., et al., “Random access quantum information processors”, arXiv:1705.00579v1 [quant-ph], May 1, 2017, 7 pages. [cited by applicant]
Richer, Susanne , “Perturbative analysis of two-qubit gates on transmon qubits”, Thesis, RWTH Aachen University, Sep. 2013, 70 pages. [cited by applicant]
Rigetti, Chad Tyler, “Quantum Gates for Superconducting Qubits”, Section 5; Dissertation—Yale University, May 2009, 46 pages. [cited by applicant]
Riste , et al., “Detecting bit-fip errors in a logical qubit using stabilizer measurements”, Nature Communications, Apr. 29, 2015, 6 pgs. [cited by applicant]
Schuster, David Isaac, “Circuit Quantum Electrodynamics”, Dissertation presented to the faculty of the graduate school, Yale University, May 1, 2007, 255 pages. [cited by applicant]
Strand, J. D., et al., “First-order sideband transitions with flux-driven asymmetric transmon qubits”, arXiv:1301.0535v2 [cond-mat.supr-con] (Journal Ref: Phys. Rev. B 87, 220505, 2013), Jun. 21, 2013, 7 pages. [cited by applicant]
Strauch, Frederick W., et al., “Quantum Logic Gates for Coupled Superconducting Phase Qubits”, Physical Review Letters, vol. 91, No. 167005, Oct. 16, 2003, 4 pages. [cited by applicant]
Strauch, Frederick W., “Quantum logic gates for superconducting resonator qudits”, Physical Review A, 84, 052313, Nov. 2011, 9 pages. [cited by applicant]