MEMORY PROTOCOL
The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can perform operations on a number of block buffers of the memory device based on commands received from a host using a block configuration register, wherein the operations can read data from the number of block buffers and write data to the number of block buffers on the memory device.
1 . An apparatus, comprising:
a memory device; and
a controller coupled to the memory device configured to:
perform operations on the memory device according to a burst length signal that indicates a burst length for the memory device, wherein the burst length signal is based on a type of the memory device performing a command associated with the burst length signal.
2 . The apparatus of claim 1 , wherein the controller receives commands from a host with the burst length signal.
3 . The apparatus of claim 1 , wherein the burst length signal is based on a type of operation performed by the memory device.
4 . The apparatus of claim 1 , wherein the burst length signal indicates a first burst length for the memory device and a second burst length for a buffer on the controller.
5 . The apparatus of claim 1 , wherein the burst length signal is based on a size of request in a command.
6 . The apparatus of claim 1 , wherein the burst length signal is based on a desired bandwidth for the memory device when performing the operations.
7 . The apparatus of claim 1 , wherein the burst length signal is based on a desired latency for the memory device when performing the operations.
8 . A system, comprising:
a host
a memory device coupled to the host, wherein the memory device includes a controller and wherein the controller is configured to:
receive a first burst length signal from the host; and
perform operations on the memory device according to the first burst length signal that indicates a first burst length for the memory device, wherein the performing the operations on the memory device according to the first burst length transfers a first particular amount of data between the host and the memory device.
9 . The system of claim 8 , wherein the controller is configured to receive a second burst length signal from the host.
10 . The system of claim 9 , wherein controller is configured to change from the first burst length to the second burst length in response to receiving the second burst length signal from the host.
11 . The system of claim 9 , wherein the controller is configured to perform operations on the memory device according to the second burst length signal that indicates a second burst length for the memory device, wherein the performing the operations on the memory device according to the second burst length transfers a second particular amount of data between the host and the memory device.
12 . The system of claim 8 , wherein the first burst length signal is based on a size of request in a command.
13 . The system of claim 8 , wherein the first burst length signal is based on performing read operations.
14 . The system of claim 9 , wherein the second burst length signal is based on performing write operations.
15 . A method, comprising:
receiving a burst length signal at a memory device from a host; and
performing operations on the memory device according to the burst length signal that indicates a burst length for the memory device, wherein the burst length signal is based on a type of the memory device performing a command associated with the burst length signal.
16 . The method of claim 15 , wherein the performing the operations on the memory device according to the burst length transfers a particular amount of data between the host and the memory device.
17 . The method of claim 15 , wherein the burst length signal is based on a type of operation performed by the memory device.
18 . The method of claim 15 , wherein the burst length signal indicates a first burst length for the memory device and a second burst length for a buffer on the controller.
19 . The method of claim 15 , wherein the burst length signal is based on a size of request in a command.
20 . The method of claim 15 , further including receiving another burst length signal to change the burst length for the memory device.