IP Library Granted Patent US 12,694,319
Granted Patent B2
US 12,694,319 · App. 18/645,818 · Granted Jul 28, 2026

Quantum streaming kernel

Inventors: Nikolas Anton Tezak (Oakland, CA); Marcus Palmer da Silva (Lafayette, CA); Robert Stanley Smith (Emeryville, CA); Christopher Mogan Wilson (Toronto, CA)
Assignee: Rigetti & Co, LLC
G06N10/40G06N10/20G06N10/80H03K19/195
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Quick Facts
Patent No.
US 12,694,319
App. No.
18/645,818
Filed
Apr 25, 2024
Granted
Jul 28, 2026
Kind
B2
Art Unit
2845
USPC
326/3
Abstract

In a general aspect, a quantum streaming kernel processes a data stream. In some aspects, an input stream of data is converted to an output stream of data by repeatedly receiving new portions of the input stream; encoding each new portion into an internal quantum state of a quantum processor; measuring a first part of the internal quantum state while maintaining coherence of a second part of the internal quantum state; and producing the output stream of data based on the measurements. In some cases, a history of the input stream is preserved by the coherence of the internal quantum state, and the measurements contain information based on the history of the input stream.

Claims (45)

1 . A method comprising:

obtaining, by operation of a classical computing resource, an input data stream comprising a time series of input data sets;

encoding, by operation of the classical computing resource, the input data stream as quantum gate parameters of a quantum logic circuit;

causing a quantum computing resource to execute the quantum logic circuit;

obtaining bitstrings based on the execution of the quantum logic circuit; and

generating an output data stream based on the bitstrings.

2 . The method of claim 1 , wherein the quantum logic circuit comprises quantum logic gates, the quantum computing resource comprises qubit devices, and executing the quantum logic circuit comprises:

applying a first set of quantum logic gates to a first subset of qubits defined by a first subset of the qubit devices;

applying a second set of quantum logic gates to the first subset of qubits and a second subset of qubits defined by a second distinct subset of the qubit devices; and

measuring a third subset of qubits defined by a third distinct subset of the qubit devices to obtain the bitstrings.

3 . The method of claim 2 , wherein the bitstrings represent computational states of the third subset of qubits.

4 . The method of claim 2 , wherein the quantum computing resource maintains a coherent state of the first and second subsets of qubits.

5 . The method of claim 2 , wherein encoding the input data stream comprises:

parameterizing the first set of quantum logic gates of the quantum logic circuit based on the input data stream.

6 . The method of claim 5 , wherein the first set of quantum logic gates comprises single-qubit rotation gates, and parameterizing the first set of quantum logic gates comprises defining rotation angles of the respective single-qubit rotation gates based on the input data stream.

7 . The method of claim 5 , wherein the first set of quantum logic gates comprises controlled-phase gates, and parameterizing the first set of quantum logic gates comprises defining phases of the respective controlled-phase gates based on the input data stream.

8 . The method of claim 2 , wherein executing the quantum logic circuit comprises:

prior to measuring the third subset of qubits, applying a third set of quantum logic gates to the second subset of qubits and the third subset of qubits.

9 . The method of claim 8 , wherein applying the second set of quantum logic gates to the first subset of qubits and the second subset of qubits comprises applying a first set of two-qubit entangling gates, each of the first set of two-qubit entangling gates being applied to a respective pair of qubits comprising one from the first subset of qubits and one from the second subset of qubits.

10 . The method of claim 9 , wherein:

applying the third set of quantum logic gates to the second subset of qubits and the third subset of qubits comprises applying a second set of two-qubit entangling gates, each of the second set of two-qubit entangling gates being applied to a respective pair of qubits comprising one from the second subset of qubits and one from the third subset of qubits.

11 . The method of claim 2 , wherein executing the quantum logic circuit comprises:

prior to applying the first set of quantum logic gates to the first subset of qubits, initializing quantum states of the first subset of the qubit devices to the first subset of qubits.

12 . A computer system comprising:

one or more classical processors;

one or more quantum processors; and

memory storing instructions that, when executed by the one or more classical processors, cause the one or more classical processors to perform operations comprising:

obtaining an input data stream comprising a time series of input data sets;

encoding the input data stream as quantum gate parameters of a quantum logic circuit;

causing the one or more quantum processors to execute the quantum logic circuit;

obtaining bitstrings based on the execution of the quantum logic circuit; and

generating an output data stream based on the bitstrings.

13 . The system of claim 12 , wherein the quantum logic circuit comprises quantum logic gates, the one or more quantum processors comprise qubit devices, and executing the quantum logic circuit comprises:

applying a first set of quantum logic gates to a first subset of qubits defined by a first subset of the qubit devices;

applying a second set of quantum logic gates to the first subset of qubits and a second subset of qubits defined by a second distinct subset of the qubit devices; and

measuring a third subset of qubits defined by a third distinct subset of the qubit devices to obtain the bitstrings.

14 . The system of claim 13 , wherein the bitstrings represent computational states of the third subset of qubits.

15 . The system of claim 13 , wherein the one or more quantum processors maintain a coherent state of the first and second subsets of qubits.

16 . The system of claim 13 , wherein encoding the input data stream comprises:

parameterizing the first set of quantum logic gates of the quantum logic circuit based on the input data stream.

17 . The system of claim 16 , wherein the first set of quantum logic gates comprises single-qubit rotation gates, and parameterizing the first set of quantum logic gates comprises defining rotation angles of the respective single-qubit rotation gates based on the input data stream.

18 . The system of claim 16 , wherein the first set of quantum logic gates comprises controlled-phase gates, and parameterizing the first set of quantum logic gates comprises defining phases of the respective controlled-phase gates based on the input data stream.

19 . The system of claim 13 , wherein executing the quantum logic circuit comprises:

prior to measuring the third subset of qubits, applying a third set of quantum logic gates to the second subset of qubits and the third subset of qubits.

20 . The system of claim 19 , wherein applying the second set of quantum logic gates to the first subset of qubits and the second subset of qubits comprises applying a first set of two-qubit entangling gates, each of the first set of two-qubit entangling gates being applied to a respective pair of qubits comprising one from the first subset of qubits and one from the second subset of qubits.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC
Reel/Frame 069603/0771 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
Reel/Frame 069603/0831 →
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 8, 2024
From: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0416 →
CHANGE OF NAME Recorded Jun 6, 2024
From: RIGETTI & CO, INC.
To: RIGETTI & CO, LLC
Reel/Frame 067661/0690 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2024
From: TEZAK, NIKOLAS ANTON; DA SILVA, MARCUS PALMER; SMITH, ROBERT STANLEY; WILSON, CHRISTOPHER MOGAN
To: RIGETTI & CO, INC.
Reel/Frame 067624/0784 →
Continuity (5)
Continuation 18317674 · May 15, 2023
Continuation 17168634 · Feb 5, 2021
Continuation PCTUS2019045866 · Aug 9, 2019
Provisional Application 62716678 · Aug 9, 2018
Related Publication 20250348771A1 · Nov 13, 2025
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