IP Library Granted Patent US 12,641,279
Granted Patent B2
US 12,641,279 · App. 18/654,842 · Granted May 26, 2026

Symmetric merge mode motion vector coding

Inventors: Hua Yang (Plainsboro, NJ); Yuwen He (San Diego, CA)
Assignee: InterDigital VC Holdings, Inc.
H04N19/52H04N19/105H04N19/139H04N19/159H04N19/172H04N19/30H04N19/577
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,641,279
App. No.
18/654,842
Granted
May 26, 2026
Kind
B2
Abstract

Systems, devices, and methods are described herein for symmetric merge mode motion vector coding. Symmetric bi-prediction (bi-pred) motion vectors (MVs) may be constructed from available candidates in a merge candidate list for regular inter prediction merge mode and/or affine prediction merge mode. Available MV merge candidates may be symmetrically extended or mapped in either direction (e.g., between reference pictures before and after a current picture), for example, when coding a picture that allows bi-directional motion compensation prediction (MCP). A symmetric bi-pred merge candidate may be selected among merge candidates for predicting the motion information of a current prediction unit (PU). The symmetric mapping construction may be repeated by a decoder (e.g., based on a coded index of the MV merge candidate list), for example, to obtain the same merge candidates and coded MV at an encoder.

Claims (44)

1 . A device for video decoding, comprising:

a processor configured to:

obtain, for a prediction unit (PU) in a current picture, a merge candidate list;

obtain a symmetric affine merge candidate based on an affine merge candidate of the merge candidate list, wherein the symmetric affine merge candidate comprises a first symmetric motion vector difference (MVD);

generate an updated merge candidate list for a prediction of an MVD for the PU, wherein the updated merge candidate list comprises the affine merge candidate and the symmetric affine merge candidate; and

decode, based on the prediction of the MVD for the PU, the current picture comprising the PU.

2 . The device of claim 1 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

3 . The device of claim 2 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the processor is further configured to:

determine the second symmetric MVD using a zooming factor that is inverse to a zooming factor associated with a second control point of the affine merge candidate.

4 . The device of claim 2 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the processor is further configured to:

determine the second symmetric MVD using a rotation angle that is in an opposite direction to a rotation angle associated with a second control point of the affine merge candidate.

5 . The device of claim 1 , wherein the first symmetric MVD indicates a translational MVD that is symmetric to the MVD of a control point associated with the affine merge candidate.

6 . The device of claim 1 , wherein the affine merge candidate is associated with a first reference picture, and the symmetric affine merge candidate is associated with a second reference picture, and wherein a first picture order count (POC) difference associated with the current picture and the first reference picture is the same as a second POC difference associated with the current picture and the second reference picture.

7 . The device of claim 1 , wherein the updated merge candidate list is generated by inserting the symmetric affine merge candidate into the merge candidate list.

8 . The device of claim 1 , wherein the affine merge candidate is a uni-directional prediction merge candidate or a bi-directional prediction merge candidate.

9 . The device of claim 1 , wherein the updated merge candidate list further comprises a zero MVD, and wherein a placement of the symmetric affine merge candidate is before a placement of the zero MVD.

10 . The device of claim 1 , wherein the processor is further configured to:

select the symmetric affine merge candidate from the updated merge candidate list for the prediction of the MVD for the PU; and

determine a motion vector associated with the PU based on a motion vector predictor (MVP) associated with the PU and the symmetric affine merge candidate, wherein the current picture is decoded based on the motion vector associated with the PU.

11 . A method for video decoding, comprising:

obtaining, for a prediction unit (PU) in a current picture, a merge candidate list;

obtaining a symmetric affine merge candidate based on an affine merge candidate of the merge candidate list, wherein the symmetric affine merge candidate comprises a first symmetric motion vector difference (MVD);

generating an updated merge candidate list for a prediction of an MVD for the PU, wherein the updated merge candidate list comprises the affine merge candidate and the symmetric affine merge candidate; and

decoding, based on the prediction of the MVD for the PU, the current picture comprising the PU.

12 . The method of claim 11 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

13 . The method of claim 12 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises:

determining the second symmetric MVD using a zooming factor that is inverse to a zooming factor associated with a second control point of the affine merge candidate.

14 . The method of claim 12 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises:

determining the second symmetric MVD using a rotation angle that is in an opposite direction to a rotation angle associated with a second control point of the affine merge candidate.

15 . A device for video encoding, comprising:

a processor configured to:

obtain, for a prediction unit (PU) in a current picture, a merge candidate list;

obtain a symmetric affine merge candidate based on an affine merge candidate of the merge candidate list, wherein the symmetric affine merge candidate comprises a first symmetric motion vector difference (MVD);

generate an updated merge candidate list for a prediction of an MVD for the PU, wherein the updated merge candidate list comprises the affine merge candidate and the symmetric affine merge candidate; and

encode, based on the prediction of the MVD for the PU, the current picture comprising the PU.

16 . The device of claim 15 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

17 . The device of claim 16 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the processor is further configured to determine the second symmetric MVD using at least one of a zooming factor or a rotation angle, wherein the zooming factor is inverse to a zooming factor associated with a second control point of the affine merge candidate, and wherein the rotation angle is in an opposite direction to a rotation angle associated with the second control point of the affine merge candidate.

18 . A method for video encoding, comprising:

obtaining, for a prediction unit (PU) in a current picture, a merge candidate list;

obtaining a symmetric affine merge candidate based on an affine merge candidate of the merge candidate list, wherein the symmetric affine merge candidate comprises a first symmetric motion vector difference (MVD);

generating an updated merge candidate list for a prediction of an MVD for the PU, wherein the updated merge candidate list comprises the affine merge candidate and the symmetric affine merge candidate; and

encoding, based on the prediction of the MVD for the PU, the current picture comprising the PU.

19 . The method of claim 18 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

20 . The method of claim 19 , wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises determining the second symmetric MVD using at least one of a zooming factor or a rotation angle, wherein the zooming factor is inverse to a zooming factor associated with a second control point of the affine merge candidate, and wherein the rotation angle is in an opposite direction to a rotation angle associated with the second control point of the affine merge candidate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2024
From: YANG, HUA; HE, YUWEN
To: VID SCALE, INC.
Reel/Frame 069146/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2024
From: VID SCALE, INC.
To: INTERDIGITAL VC HOLDINGS, INC.
Reel/Frame 068284/0031 →
Continuity (3)
Continuation 17438119
Provisional Application 62816586 · Mar 11, 2019
Related Publication 20240292018A1 · Aug 29, 2024
References Cited (37)
US 20150312588A1 · Yamamoto · 2015 [cited by examiner]
US 20160050430A1 · Xiu et al. · 2016 [cited by applicant]
US 20170332095A1 · Zou · 2017 [cited by examiner]
US 20180249154A1 · Chuang · 2018 [cited by examiner]
US 20180270500A1 · Li et al. · 2018 [cited by applicant]
US 20180278949A1 · Karczewicz · 2018 [cited by examiner]
US 20180359483A1 · Chen · 2018 [cited by examiner]
US 20190058896A1 · Huang et al. · 2019 [cited by applicant]
US 20200267408A1 · Lee · 2020 [cited by examiner]
US 20200366928A1 · Liu et al. · 2020 [cited by applicant]
US 20200404253A1 · Chen · 2020 [cited by examiner]
US 20210266588A1 · Liu · 2021 [cited by examiner]
US 20210377520A1 · Chen · 2021 [cited by examiner]
US 20220191477A1 · Zhang · 2022 [cited by examiner]
US 20230156181A1 · Chen · 2023 [cited by examiner]
CN 105122803A · 2015 [cited by applicant]
CN 108605137A · 2018 [cited by applicant]
EP 3547687A2 · 2019 [cited by applicant]
WO 2012121808A1 · 2012 [cited by applicant]
WO 2017036414A1 · 2017 [cited by applicant]
WO 2018097693A2 · 2018 [cited by applicant]
Bossen, et al., “JVET Common Test Conditions and Software Reference Configurations for SDR Video”, JVET-M1010-V1, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: Marrakec… [cited by applicant]
Bossen, Frank, “VTM-4.0 Reference Software”, Available at <https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM/tags/VTM-4.0>, retrieved on Sep. 10, 2021, pp. 1-2. [cited by applicant]
Bross, et al., “High Efficiency Video Coding (HEVC) Text Specification Draft 10 (for FDIS & Last Call)”, JCTVC-L1003_V34, Editor, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/S… [cited by applicant]
Bross, et al., “Versatile Video Coding (Draft 4)”, JVET-M1001-V7, Editors, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: Marrakech, MA, Jan. 9- 18, 2019, 300 pages. [cited by applicant]
Chen, et al., “CE4: Symmetrical MVD Mode (Test 4.5.1)”, JVET-L0370-V1, Huawei Technologies Co., Ltd., Joint Video Experts Team JVET of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 12th Meeting: Macao, China, Oct. 3-1… [cited by applicant]
Chen, et al., “Algorithm Description for Versatile Video Coding and Test Model 4 (VTM 4)”, JVET-M1002-V2, Editors, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: Marrake… [cited by applicant]
Chen, et al., “Description of SDR, HDR and 360° Video Coding Technology Proposal by Qualcomm and Technicolor—Low and High Complexity Versions”, JVET of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11; 10th Meeting: San D… [cited by applicant]
Fuh, et al., “Motion Displacement Estimation Using an Affine Model for Image Matching”, Optical Engineering, vol. 30, No. 7, Jul. 1991, pp. 881-887. [cited by applicant]
ITU-T, “Advanced Video Coding for Generic Audiovisual Services”, ITU-T Recommendation H.264, Series H: Audiovisual and Multimedia Systems, Infrastructure of Audiovisual Services—Coding of Moving Video, Nov. 2007, 563 pa… [cited by applicant]
Li, et al., “An Efficient Four-Parameter Affine Motion Model for Video Coding”, IEEE Transactions on Circuits and Systems for Video Technology, vol. 28, No. 8, Aug. 2018, pp. 1934-1948. [cited by applicant]
Luo, et al., “CE4-Related: Simplified Symmetric MVD Based on CE4.4.3”, JVET-M0444-V2, InterDigital Communications, Inc., Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: M… [cited by applicant]
Segall, et al., “Joint Call for Proposals on Video Compression with Capability Beyond Hevc”, JVET-H1002 (V6), Editors, Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 8th Meeting: … [cited by applicant]
SMPTE, “VC-1 Compressed Video Bitstream Format and Decoding Process”, SMPTE 421M, Feb. 24, 2006, 493 pages. [cited by applicant]
Sullivan, et al., “Overview of the High Efficiency Video Coding (HEVC) Standard”, IEEE Transactions on Circuits and Systems for Video Technology, vol. 22, No. 12, Dec. 2012, pp. 1649-1668. [cited by applicant]
Luo et al., “CE2-related: Symmetric MVD for Affine Bi-prediction Coding”, JVET-M0467-v2, Interdigital Communications, Inc., Joint Video Experts Team (JVET) of ITU-TSG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting,… [cited by applicant]
Yang et al., “CE2: Symmetric MVD for affine bi-prediction coding (CE2-1.2)”, Interdigital Communications, Inc., JVET-N0319, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 14th Meeting… [cited by applicant]